Patents by Inventor Shrinath Ramaswami

Shrinath Ramaswami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11050982
    Abstract: In an array of multi-color vertical detector color pixel sensors, a readout wiring architecture includes a transfer transistor for each individual color detector. In first and second rows in a first column, the first, second, and third color transfer transistor gates are coupled, respectively, to the first, second, and third row-select lines. In a first row in a second column, the first color transfer transistor gate is coupled to the second row-select line, the second color transfer transistor gate is coupled to the first row-select line, and the third color transfer transistor gate is coupled to the third row-select line. In a second row in the second column, the first color transfer transistor gate is coupled to the first row-select line, the second color transfer transistor gate is coupled to the third row-select line, and t the third color transfer transistor gate is coupled to the second row-select line.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: June 29, 2021
    Assignee: Foveon, Inc.
    Inventors: Shrinath Ramaswami, Tatsuya Inui, Shigemi Yamazaki, Jonathan Yu, Glenn Keller
  • Publication number: 20200228761
    Abstract: In an array of multi-color vertical detector color pixel sensors, a readout wiring architecture includes a transfer transistor for each individual color detector. In first and second rows in a first column, the first, second, and third color transfer transistor gates are coupled, respectively, to the first, second, and third row-select lines. In a first row in a second column, the first color transfer transistor gate is coupled to the second row-select line, the second color transfer transistor gate is coupled to the first row-select line, and the third color transfer transistor gate is coupled to the third row-select line. In a second row in the second column, the first color transfer transistor gate is coupled to the first row-select line, the second color transfer transistor gate is coupled to the third row-select line, and t the third color transfer transistor gate is coupled to the second row-select line.
    Type: Application
    Filed: March 27, 2020
    Publication date: July 16, 2020
    Applicant: Foveon, Inc.
    Inventors: Shrinath Ramaswami, Tatsuya Inui, Shigemi Yamazaki, Jonathan Yu, Glenn KELLER
  • Patent number: 10616535
    Abstract: In an array containing rows and columns of multi-color vertical detector color pixel sensors disposed in a rows and columns of the array, a readout wiring architecture includes a plurality of row-select lines for each row of the array, equal to the number of colors in the vertical detector color pixel sensors, an individual column line for each column, a transfer transistor for each individual color detector coupled between a color detector and a column line associated with the column in which the color detector is disposed. Each transfer transistor has a gate coupled to one of the plurality of row-select lines in a row in which the vertical detector color pixel sensor is disposed. The gates of at least some of the transfer transistors in each row for each color detector in adjacent columns of the array are coupled to different ones of the row-select lines for that row.
    Type: Grant
    Filed: October 1, 2018
    Date of Patent: April 7, 2020
    Assignee: Foveon, Inc.
    Inventors: Shrinath Ramaswami, Tatsuya Inui, Shigemi Yamazaki, Jonathan Yu, Glenn Keller
  • Publication number: 20200105819
    Abstract: A focal plane phase detect pixel sensor is formed on a substrate and includes a surface pixel sensor formed in a pixel sensor area at a surface of the substrate. The surface pixel sensor has a sensing area occupying no more than an adjacent pair of quadrants centered in the pixel sensor area. A microlens is disposed over the surface pixel sensor.
    Type: Application
    Filed: October 2, 2018
    Publication date: April 2, 2020
    Applicant: Foveon, Inc.
    Inventor: Shrinath Ramaswami
  • Publication number: 20200106995
    Abstract: In an array containing rows and columns of multi-color vertical detector color pixel sensors disposed in a rows and columns of the array, a readout wiring architecture includes a plurality of row-select lines for each row of the array, equal to the number of colors in the vertical detector color pixel sensors, an individual column line for each column, a transfer transistor for each individual color detector coupled between a color detector and a column line associated with the column in which the color detector is disposed. Each transfer transistor has a gate coupled to one of the plurality of row-select lines in a row in which the vertical detector color pixel sensor is disposed. The gates of at least some of the transfer transistors in each row for each color detector in adjacent columns of the array are coupled to different ones of the row-select lines for that row.
    Type: Application
    Filed: October 1, 2018
    Publication date: April 2, 2020
    Applicant: Foveon, Inc.
    Inventors: Shrinath Ramaswami, Tatsuya Inui, Shigemi Yamazaki, Jonathan Yu, Glenn Keller
  • Patent number: 10608039
    Abstract: A focal plane phase detect pixel sensor is formed on a substrate and includes a surface pixel sensor formed in a pixel sensor area at a surface of the substrate. The surface pixel sensor has a sensing area occupying no more than an adjacent pair of quadrants centered in the pixel sensor area. A microlens is disposed over the surface pixel sensor.
    Type: Grant
    Filed: October 2, 2018
    Date of Patent: March 31, 2020
    Assignee: Foveon, Inc.
    Inventor: Shrinath Ramaswami
  • Patent number: 10475840
    Abstract: A pixel sensor array includes a plurality of surface pixel sensors disposed in a substrate, a layer of dielectric material formed over the surface of the pixel sensors, a plurality of apertures formed in the dielectric layer each aligned with one of the surface pixel sensors and having an inner side wall. A lining layer is formed on the inner side wall of each aperture and is substantially fully reflective to visible light. The lining layer is spaced apart from the surface of the substrate and has a smaller cross-sectional area than a cross-sectional area of each surface pixel sensor. A filler material substantially transparent to visible light is disposed inside of the reflective lining layer and has a top surface lying in the plane with the top surface of the layer of dielectric material. A microlens is disposed over the top surface of each aperture.
    Type: Grant
    Filed: October 2, 2018
    Date of Patent: November 12, 2019
    Assignee: Foveon, Inc.
    Inventor: Shrinath Ramaswami
  • Patent number: 10319113
    Abstract: A method for performing restoration for highlights and saturated regions in a digital image includes analyzing the pixels in the image and compensating an appropriate amount to identified highlights and saturated pixels. For a pixel with vertical color channels, the output for each channel is highly correlated, and each color channel can be recovered as a combination of the other channels. Each selected pixel in the highlights or saturated regions is identified as a restorable pixel only if at least two color channels of the pixel are not saturated. For each restorable pixel, a replacement pixel value is generated by using the equation derived from the color channels correlation. For pixels where more than one color channel is saturated, the similarity is calculated between these pixels and restored pixels. These pixels can be compensated using the combination of the similarity index and the pixel values of other color channels.
    Type: Grant
    Filed: June 21, 2017
    Date of Patent: June 11, 2019
    Assignee: Foveon, Inc.
    Inventors: Jiashu Zhang, Shrinath Ramaswami, Ion Uehara
  • Patent number: 10178328
    Abstract: A method for performing color density filtering of images captured in a digital camera having a mechanical shutter and an imaging array including a plurality of pixels each including different color sensors aligned with each other, including opening the mechanical shutter, resetting all of the color sensors in each pixel by asserting a row reset signal, separately asserting color-select signals for each color after the mechanical shutter is opened, independently starting exposure for each different color sensor at a color sensor exposure start time by de-asserting its color select signal, the exposure start time for each different color sensor being a function of a color density filter function, closing the mechanical shutter, and reading color exposure values from the color sensors by separately asserting color-select signals after the mechanical shutter has closed, the reading being unrelated to the start times for the color sensors.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: January 8, 2019
    Assignee: Foveon, Inc.
    Inventors: Shrinath Ramaswami, Glenn J. Keller
  • Publication number: 20180374240
    Abstract: A method for performing restoration for highlights and saturated regions in a digital image includes analyzing the pixels in the image and compensating an appropriate amount to identified highlights and saturated pixels. For a pixel with vertical color channels, the output for each channel is highly correlated, and each color channel can be recovered as a combination of the other channels. Each selected pixel in the highlights or saturated regions is identified as a restorable pixel only if at least two color channels of the pixel are not saturated. For each restorable pixel, a replacement pixel value is generated by using the equation derived from the color channels correlation. For pixels where more than one color channel is saturated, the similarity is calculated between these pixels and restored pixels. These pixels can be compensated using the combination of the similarity index and the pixel values of other color channels.
    Type: Application
    Filed: June 21, 2017
    Publication date: December 27, 2018
    Applicant: Foveon, Inc.
    Inventors: Jiashu Zhang, Shrinath Ramaswami, Ion Uehara
  • Publication number: 20180324372
    Abstract: A method for performing color density filtering of images captured in a digital camera having a mechanical shutter and an imaging array including a plurality of pixels each including different color sensors aligned with each other, including opening the mechanical shutter, resetting all of the color sensors in each pixel by asserting a row reset signal, separately asserting color-select signals for each color after the mechanical shutter is opened, independently starting exposure for each different color sensor at a color sensor exposure start time by de-asserting its color select signal, the exposure start time for each different color sensor being a function of a color density filter function, closing the mechanical shutter, and reading color exposure values from the color sensors by separately asserting color-select signals after the mechanical shutter has closed, the reading being unrelated to the start times for the color sensors.
    Type: Application
    Filed: June 29, 2018
    Publication date: November 8, 2018
    Applicant: Foveon, Inc.
    Inventors: Shrinath Ramaswami, Glenn J. Keller
  • Patent number: 10021320
    Abstract: In a digital camera having an imaging array including a plurality of pixels arranged in rows and columns, the digital camera having a mechanical shutter, a method for performing neutral density filtering of images captured by the imaging array, the method comprising opening the mechanical shutter, operating each row in the array by resetting all of the pixel sensors in the row, starting exposure for all of the pixel sensors in the row, closing the mechanical shutter, reading pixel values from the pixels in the array after the mechanical shutter has closed at a time unrelated to a time at which any pixel-select signal was de-asserted, and wherein the interval of time between starting exposure for all of the pixel sensors in the row and closing the mechanical shutter for each row a function of a neutral density filter function applied to an image to be captured.
    Type: Grant
    Filed: June 28, 2016
    Date of Patent: July 10, 2018
    Assignee: Foveon, Inc.
    Inventors: Shrinath Ramaswami, Glenn J. Keller
  • Publication number: 20170374302
    Abstract: In a digital camera having an imaging array including a plurality of pixels arranged in rows and columns, the digital camera having a mechanical shutter, a method for performing neutral density filtering of images captured by the imaging array, the method comprising opening the mechanical shutter, operating each row in the array by resetting all of the pixel sensors in the row, starting exposure for all of the pixel sensors in the row, closing the mechanical shutter, reading pixel values from the pixels in the array after the mechanical shutter has closed at a time unrelated to a time at which any pixel-select signal was de-asserted, and wherein the interval of time between starting exposure for all of the pixel sensors in the row and closing the mechanical shutter for each row a function of a neutral density filter function applied to an image to be captured.
    Type: Application
    Filed: June 28, 2016
    Publication date: December 28, 2017
    Applicant: Foveon, Inc.
    Inventors: Shrinath Ramaswami, Glenn J. Keller
  • Patent number: 6777662
    Abstract: An extended dynamic range pixel cell providing blooming protection is disclosed herein. By applying a timed varying signal to a shunt transistor in order to shunt excess charge generated by a photosensor in response to high intensity illumination, blooming protection can be provided. In particular configurations, blooming protection is provided not only during an integration period but also during a readout period when the pixel cell is generally most susceptible to blooming problems. The time varying voltage is also used to extend the dynamic range of the pixel cell thereby increasing the pixel cells usefulness in high contrast conditions, such as bright sunlight casting deep shadows, nighttime automotive applications, and the like.
    Type: Grant
    Filed: July 30, 2002
    Date of Patent: August 17, 2004
    Assignee: FreeScale Semiconductor, Inc.
    Inventors: Clifford I. Drowley, Shrinath Ramaswami
  • Publication number: 20040021058
    Abstract: An extended dynamic range pixel cell providing blooming protection is disclosed herein. By applying a timed varying signal to a shunt transistor in order to shunt excess charge generated by a photosensor in response to high intensity illumination, blooming protection can be provided. In particular configurations, blooming protection is provided not only during an integration period but also during a readout period when the pixel cell is generally most susceptible to blooming problems. The time varying voltage is also used to extend the dynamic range of the pixel cell thereby increasing the pixel cells usefulness in high contrast conditions, such as bright sunlight casting deep shadows, nighttime automotive applications, and the like.
    Type: Application
    Filed: July 30, 2002
    Publication date: February 5, 2004
    Inventors: Clifford I. Drowley, Shrinath Ramaswami
  • Patent number: 6541794
    Abstract: An imaging circuit (10) is formed on a semiconductor substrate (40) having first and second regions (41, 42) for capturing a light signal (LIGHT) to produce first and second charges, respectively. A conductive material (52, 53) is extended from the first region to the second region for controlling the first and second charges in response to a control signal (COL1, ROW1) to produce an output signal (VOUT) of the imaging circuit.
    Type: Grant
    Filed: August 31, 2000
    Date of Patent: April 1, 2003
    Assignee: Motorola, Inc.
    Inventors: Jennifer J. Patterson, Clifford I. Drowley, Shrinath Ramaswami
  • Patent number: 6221686
    Abstract: An image sensor (10) has an image sensing element that includes an N-type conducting region (26) and a P-type pinned layer (37). The two regions form two P-N junctions at different depths that increase the efficiency of charge carrier collection at different frequencies of light. The conducting region (26) is formed by an angle implant that ensures that a portion of the conducting region (26) can function as a source of a MOS transistor (32).
    Type: Grant
    Filed: January 28, 2000
    Date of Patent: April 24, 2001
    Assignee: Motorola, Inc.
    Inventors: Clifford I. Drowley, Mark S. Swenson, Jennifer J. Patterson, Shrinath Ramaswami
  • Patent number: 6023081
    Abstract: An image sensor (10) has an image sensing element that includes an N-type conducting region (26) and a P-type pinned layer (37). The two regions form two P-N junctions at different depths that increase the efficiency of charge carrier collection at different frequencies of light. The conducting region (26) is formed by an angle implant that ensures that a portion of the conducting region (26) can function as a source of an MOS transistor (32).
    Type: Grant
    Filed: November 14, 1997
    Date of Patent: February 8, 2000
    Assignee: Motorola, Inc.
    Inventors: Clifford I. Drowley, Mark S. Swenson, Jennifer J. Patterson, Shrinath Ramaswami
  • Patent number: 5783475
    Abstract: A method of forming a spacer (41) around a gate electrode (32) includes sequentially disposing a first layer (48), a second layer (36), and a third layer (37) of dielectric over a semiconductor substrate (31) and over the gate electrode (32) and, thereafter, sequentially etching the third (37), second (36), and first (48) layers. The third layer (37) is etched with a first etchant to define a width (51) for the spacer (41). The first etchant selectively etches the third layer (37) versus the second layer (36). Etching the third layer (37) does not expose the first layer (48) located beneath the second layer (36). A second etchant, which is different from the first etchant, is used to selectively etch the second layer (36) versus the first layer (48). Etching the second layer (36) does not expose the semiconductor substrate (31) located beneath the first layer (48).
    Type: Grant
    Filed: November 20, 1997
    Date of Patent: July 21, 1998
    Assignee: Motorola, Inc.
    Inventor: Shrinath Ramaswami
  • Patent number: 5374568
    Abstract: A method for forming an improved base link for a bipolar transistor is provided. The wall where the base link (44) is formed is substantially vertical (32,34). An oxide mask (24) is use during etching of the polysilicon layer (18) that provides the wall, instead of a conventional photoresist mask. The preferred method is compatible with manufacturing BiCMOS devices.
    Type: Grant
    Filed: September 23, 1993
    Date of Patent: December 20, 1994
    Assignee: Motorola, Inc.
    Inventors: Wen-Ling M. Huang, Shrinath Ramaswami, Maureen F. Grimaldi