Patents by Inventor SHRUTI SHARMA

SHRUTI SHARMA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240119015
    Abstract: Systems, apparatuses and methods may provide for technology that detects a condition in which a plurality of atomic instructions target a common address and different bit positions in a mask, generates a combined read-lock request for the plurality of atomic instructions in response to the condition, and sends the combined read-lock request to a lock buffer coupled to a memory device associated with the common address.
    Type: Application
    Filed: August 30, 2023
    Publication date: April 11, 2024
    Inventors: Shruti Sharma, Robert Pawlowski
  • Patent number: 11941355
    Abstract: Techniques are described herein for using operational transforms to perform operations on parallel copies of a document model. A method includes: determining that a first operation is to be performed on a second parallel copy; and in response: determining that a revision of a first parallel copy matches a revision of the second parallel copy; and in response: performing the first operation on the second parallel copy to obtain a calculation result including a first list of commands; applying the first list of commands to the second parallel copy; performing an operational transform on at least one command in the first list of commands based on queued user edits to the first parallel copy, the queued user edits including a second list of commands, to obtain a transformed list of commands; and applying the transformed list of commands to the first parallel copy.
    Type: Grant
    Filed: June 9, 2022
    Date of Patent: March 26, 2024
    Assignee: GOOGLE LLC
    Inventors: Nishir Shelat, Tim Sears, Tanuj Sharma, Srivatsan Narayanan, Shruti Jain, Luiz Franca Pereira Filho, Kashish Bansal, Julian Rajeshwar, Chris Terefinko, Asim Fazal, Archit Gupta
  • Publication number: 20240028555
    Abstract: Techniques for multi-dimensional network sorted array intersection. A first switch of a plurality of switches of an apparatus may receive a first element of a first array from a first compute tile of the plurality of compute tiles and a first element of a second array from a second compute tile of the plurality of compute tiles. The first switch may determine that the first element of the first array is equal to the first element of the second array. The first switch may cause the first element of the first array to be stored as a first element of an output array, the output array to comprise an intersection of the first array and the second array.
    Type: Application
    Filed: September 29, 2023
    Publication date: January 25, 2024
    Inventors: Robert Pawlowski, Sriram Aananthakrishna, Shruti Sharma
  • Publication number: 20240020253
    Abstract: Systems, apparatuses and methods may provide for technology that detects a plurality of sub-instruction requests from a first memory engine in a plurality of memory engines, wherein the plurality of sub-instruction requests are associated with a direct memory access (DMA) data type conversion request from a first pipeline, wherein each sub-instruction request corresponds to a data element in the DMA data type conversion request, and wherein the first memory engine is to correspond to the first pipeline, decodes the plurality of sub-instruction requests to identify one or more arguments, loads a source array from a dynamic random access memory (DRAM) in a plurality of DRAMs, wherein the operation engine is to correspond to the DRAM, and conducts a conversion of the source array from a first data type to a second data type in accordance with the one or more arguments.
    Type: Application
    Filed: September 29, 2023
    Publication date: January 18, 2024
    Inventors: Shruti Sharma, Robert Pawlowski, Fabio Checconi, Jesmin Jahan Tithi
  • Patent number: 11805027
    Abstract: A serverless computing system is configured to provide access to a machine learning model by at least associating an endpoint, comprising code that accesses the machine learning model, with an extension that interfaces between a serverless compute architecture and the endpoint. A request to perform an inference is received by the system and processed by using the serverless compute architecture to execute a compute function. The compute function cases the extension to interface with the endpoint to cause the machine learning model to perform the inference.
    Type: Grant
    Filed: March 31, 2022
    Date of Patent: October 31, 2023
    Assignee: Amazon Technologies, Inc.
    Inventors: Maximiliano Maccanti, Gowda Dayananda Anjaneyapura Range, Rishabh Ray Chaudhury, Michael Pham, Shruti Sharma, Saumitra Vikram, James Alan Sanders, Mihir Sathe
  • Publication number: 20230333998
    Abstract: Systems, apparatuses and methods may provide for technology that includes a plurality of memory engines corresponding to a plurality of pipelines, wherein each memory engine in the plurality of memory engines is adjacent to a pipeline in the plurality of pipelines, and wherein a first memory engine is to request one or more direct memory access (DMA) operations associated with a first pipeline, and a plurality of operation engines corresponding to a plurality of dynamic random access memories (DRAMs), wherein each operation engine in the plurality of operation engines is adjacent to a DRAM in the plurality of DRAMs, and wherein one or more of the plurality of operation engines is to conduct the one or more DMA operations based on one or more bitmaps.
    Type: Application
    Filed: May 5, 2023
    Publication date: October 19, 2023
    Inventors: Shruti Sharma, Robert Pawlowski, Fabio Checconi, Jesmin Jahan Tithi
  • Publication number: 20230315451
    Abstract: Systems, apparatuses and methods may provide for technology that detects, by an operation engine, a plurality of sub-instruction requests from a first memory engine in a plurality of memory engines, wherein the plurality of sub-instruction requests are associated with a direct memory access (DMA) bitmap manipulation request from a first pipeline, wherein each sub-instruction request corresponds to a data element in the DMA bitmap manipulation request, and wherein the first memory engine is to correspond to the first pipeline. The technology also detects, by the operation engine, one or more arguments in the plurality of sub-instruction requests, sends, by the operation engine, one or more load requests to a DRAM in the plurality of DRAMs in accordance with the one or more arguments, and sends, by the operation engine, one or more store requests to the DRAM in accordance with the one or more arguments, wherein the operation engine is to correspond to the DRAM.
    Type: Application
    Filed: May 31, 2023
    Publication date: October 5, 2023
    Inventors: Shruti Sharma, Robert Pawlowski, Fabio Checconi, Jesmin Jahan Tithi
  • Publication number: 20230169396
    Abstract: A system is configured to provide access to a machine learning model by using a hybrid configuration comprising a dedicate server on which an instance of a model server is installed, and a serverless compute architecture that interfaces with an instance of the model server using an extension. A first portion of requests directed to the model server are processed by the dedicated server, and a second portion of the requests is processed by the serverless compute architecture.
    Type: Application
    Filed: March 31, 2022
    Publication date: June 1, 2023
    Inventors: Maximiliano Maccanti, Gowda Dayananda Anjaneyapura Range, Rishabh Ray Chaudhury, Michael Pham, Shruti Sharma, Saumitra Vikram, James Alan Sanders, Mihir Sathe
  • Publication number: 20230171164
    Abstract: A serverless computing system is configured to provide access to a machine learning model by at least associating an endpoint, comprising code that accesses the machine learning model, with an extension that interfaces between a serverless compute architecture and the endpoint. A request to perform an inference is received by the system and processed by using the serverless compute architecture to execute a compute function. The compute function cases the extension to interface with the endpoint to cause the machine learning model to perform the inference.
    Type: Application
    Filed: March 31, 2022
    Publication date: June 1, 2023
    Inventors: Maximiliano Maccanti, Gowda Dayananda Anjaneyapura Range, Rishabh Ray Chaudhury, Michael Pham, Shruti Sharma, Saumitra Vikram, James Alan Sanders, Mihir Sathe
  • Publication number: 20230110698
    Abstract: Disclosed are some implementations of systems, apparatus, methods and computer program products for implementing a shim driver configurable to provide a database driver. A shim driver class is loaded from a class path and instantiated such that a shim driver is generated. A directory path and database driver class name are obtained from a configuration file. An application transmits a request for a database driver via an application programming interface (API) of the shim driver, where the request includes the directory path and database driver class name. The shim driver loads a database driver class identified by the database driver class name using the directory path, instantiates the database driver class such that a first database driver is generated, and provides the first database driver responsive to the request.
    Type: Application
    Filed: October 5, 2021
    Publication date: April 13, 2023
    Applicant: Salesforce.com, Inc.
    Inventors: Vadim YAROVOY, Raghavendran HANUMANTHARAU, Olga TIKHONOVA, Da ZHAO, Arundhati TAMBE, Shruti SHARMA, Jason WOODS
  • Publication number: 20220414038
    Abstract: Systems, methods, and apparatuses for direct memory access instruction set architecture support for flexible dense compute using a reconfigurable spatial array are described.
    Type: Application
    Filed: June 25, 2021
    Publication date: December 29, 2022
    Inventors: ROBERT PAWLOWSKI, BHARADWAJ KRISHNAMURTHY, SHRUTI SHARMA, BYOUNGCHAN OH, JING FANG, DANIEL KLOWDEN, JASON HOWARD, JOSHUA FRYMAN
  • Publication number: 20220356530
    Abstract: The invention provides methods for determining the growth rate of ctDNA, comprising (a) sequencing nucleic acids isolated from a biological sample of a cancer patient to identify patient-specific cancer mutations; (b) quantify the amount of ctDNA in a first liquid biopsy sample collected from the cancer patient by performing a multiplex amplification reaction to amplify target loci from cfDNA isolated from the first liquid biopsy sample, wherein each target locus spans at least one patient-specific cancer mutation, and sequencing the amplified target loci to identify the patient-specific cancer mutations and quantify the amount of ctDNA in the first liquid biopsy sample; (c) quantify the amount of ctDNA in a second liquid biopsy sample collected from the cancer patient by performing a multiplex amplification reaction to amplify target loci from cfDNA isolated from the second liquid biopsy sample, wherein each target locus spans at least one patient-specific cancer mutation, and sequencing the amplified target
    Type: Application
    Filed: April 20, 2022
    Publication date: November 10, 2022
    Applicant: Natera, Inc.
    Inventors: Shruti SHARMA, Bernhard ZIMMERMANN, Himanshu SETHI, Alexey ALESHIN, Svetlana SHCHEGROVA
  • Patent number: 11237107
    Abstract: Disclosed is a fluorescence image analyzing apparatus including a light source that emits light to a sample including a plurality of cells labeled with a fluorescent dye at a target site, an imaging unit that captures a fluorescence image of each of the cells that emit fluorescence by being irradiated with the light, a processing unit that processes the fluorescence image captured by the imaging unit, and a display unit that displays the fluorescence image processed by the processing unit. The processing unit performs an extraction process of extracting, for each cell, a plurality of bright spots in the fluorescence image including the target site, a changing process of changing a pixel value of each of the plurality of extracted bright spots based on the pixel value of each bright spot, and a display process of displaying the fluorescence image whose pixel value is changed on the display unit.
    Type: Grant
    Filed: February 17, 2020
    Date of Patent: February 1, 2022
    Assignee: SYSMEX CORPORATION
    Inventors: Shohei Matsumoto, Shruti Sharma
  • Publication number: 20210409265
    Abstract: Examples described herein relate to a first group of core nodes to couple with a group of switch nodes and a second group of core nodes to couple with the group of switch nodes, wherein: a core node of the first or second group of core nodes includes circuitry to execute one or more message passing instructions that indicate a configuration of a network to transmit data toward two or more endpoint core nodes and a switch node of the group of switch nodes includes circuitry to execute one or more message passing instructions that indicate the configuration to transmit data toward the two or more endpoint core nodes.
    Type: Application
    Filed: September 13, 2021
    Publication date: December 30, 2021
    Inventors: Robert PAWLOWSKI, Vincent CAVE, Shruti SHARMA, Fabrizio PETRINI, Joshua B. FRYMAN, Ankit MORE
  • Publication number: 20210149683
    Abstract: Examples include techniques for an in-network acceleration of a parallel prefix-scan operation. Examples include configuring registers of a node included in a plurality of nodes on a same semiconductor package. The registers to be configured responsive to receiving an instruction that indicates a logical tree to map to a network topology that includes the node. The instruction associated with a prefix-scan operation to be executed by at least a portion of the plurality of nodes.
    Type: Application
    Filed: December 21, 2020
    Publication date: May 20, 2021
    Inventors: Ankit MORE, Fabrizio PETRINI, Robert PAWLOWSKI, Shruti SHARMA, Sowmya PITCHAIMOORTHY
  • Patent number: 10755398
    Abstract: An image display apparatus 120 for imaging and displaying a test substance contained in a sample 111 includes an imaging unit 200 for imaging a test substance, an image processing unit 121 for generating an image 61 for display including an additional image 11c in which the pixel value of each pixel is set in uneven distribution added to at least part of the captured image 11 obtained by the imaging unit 200 and a region 21 of the test substance, and a display unit 123 for displaying the image 61 generated by the image processing unit 121.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: August 25, 2020
    Assignee: SYSMEX CORPORATION
    Inventors: Shruti Sharma, Shohei Matsumoto
  • Publication number: 20200249165
    Abstract: Disclosed is a fluorescence image analyzing apparatus including a light source that emits light to a sample including a plurality of cells labeled with a fluorescent dye at a target site, an imaging unit that captures a fluorescence image of each of the cells that emit fluorescence by being irradiated with the light, a processing unit that processes the fluorescence image captured by the imaging unit, and a display unit that displays the fluorescence image processed by the processing unit. The processing unit performs an extraction process of extracting, for each cell, a plurality of bright spots in the fluorescence image including the target site, a changing process of changing a pixel value of each of the plurality of extracted bright spots based on the pixel value of each bright spot, and a display process of displaying the fluorescence image whose pixel value is changed on the display unit.
    Type: Application
    Filed: February 17, 2020
    Publication date: August 6, 2020
    Applicant: SYSMEX CORPORATION
    Inventors: Shohei MATSUMOTO, Shruti SHARMA
  • Patent number: 10605731
    Abstract: Disclosed is a fluorescence image analyzing apparatus including a light source that emits light to a sample including a plurality of cells labeled with a fluorescent dye at a target site, an imaging unit that captures a fluorescence image of each of the cells that emit fluorescence by being irradiated with the light, a processing unit that processes the fluorescence image captured by the imaging unit, and a display unit that displays the fluorescence image processed by the processing unit. The processing unit performs an extraction process of extracting, for each cell, a plurality of bright spots in the fluorescence image including the target site, a changing process of changing a pixel value of each of the plurality of extracted bright spots based on the pixel value of each bright spot, and a display process of displaying the fluorescence image whose pixel value is changed on the display unit.
    Type: Grant
    Filed: April 12, 2018
    Date of Patent: March 31, 2020
    Assignee: SYSMEX CORPORATION
    Inventors: Shohei Matsumoto, Shruti Sharma
  • Patent number: 10353739
    Abstract: A method for scheduling computing resources without container migration includes determining a resource availability for one or more hosts, a resource allocation for one or more virtual machines (VMs), and a resource usage for one or more containers. The method further includes calculating a target resource configuration for one or more VMs, wherein calculating a target resource configuration comprises determining an upper limit of resource demand on a VM from one or more containers allocated on the VM, based at least in part on the resource usage. The method also includes removing or adding resources to each of the one or more VMs for which a target resource configuration was calculated to achieve the target resource configuration for each VM. The method further includes allocating the one or more VMs on the one or more hosts based on the resource availability of the one or more hosts.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: July 16, 2019
    Assignee: VMware, Inc.
    Inventors: Kumar Gaurav, Anne Holler, Vaibhav Kohli, Anil Kumar, Shruti Sharma, Rajdeep Dua
  • Publication number: 20180315176
    Abstract: An image display apparatus 120 for imaging and displaying a test substance contained in a sample 111 includes an imaging unit 200 for imaging a test substance, an image processing unit 121 for generating an image 61 for display including an additional image 11c in which the pixel value of each pixel is set in uneven distribution added to at least part of the captured image 11 obtained by the imaging unit 200 and a region 21 of the test substance, and a display unit 123 for displaying the image 61 generated by the image processing unit 121.
    Type: Application
    Filed: April 27, 2018
    Publication date: November 1, 2018
    Inventors: Shruti SHARMA, Shohei MATSUMOTO