Abstract: The present disclosure relates to a high-speed superjunction lateral insulated gate bipolar transistor, and belongs to the technical field of semiconductor power devices. Fast turn-off can be achieved by replacing the lightly doped substrate of the existing bulk silicon superjunction lateral insulated gate bipolar transistor with heavily doped substrate, breakdown voltage of the device is ensured by reasonably setting the total number of impurities in each drift region of the over junction-sustaining voltage layer, and further application thereof in integrated circuits is realized by providing the semiconductor second substrate region and the semiconductor isolation region. A high speed superjunction laterally insulated gate bipolar transistor according to the present disclosure solves the contradiction between cost of the superjunction laterally insulated gate bipolar transistor and achievement of fast turn-off on a bulk silicon substrate.

Abstract: An ion source head structure of a semiconductor ion implanter including a filament, a filament clamp, a cathode, a cathode clamp, an insulation assembly is provided. The filament clamp clamps the filament. The cathode presents a shell shape and has a receiving space. The filament is located in the receiving space. The cathode clamp clamps the cathode. The insulation assembly is disposed between the filament clamp and the cathode clamp such that the filament clamp is insulated from the cathode clamp. The insulation assembly has a first surface, a second surface opposite to the first surface, and an outer surface between the first surface and the second surface, wherein the first surface of the insulation assembly is in contact with the filament clamp, and the second surface of the insulation assembly is in contact with the cathode clamp. A step difference exists on the outer surface of the insulation assembly.

Abstract: A secure cell broadcast method entails defining a group of mobile devices, reserving a channel for the group, associating cryptographic key material with the group, notifying the mobile devices of the channel for the group, securely providing the key material to the mobile devices of the group, and broadcasting on the channel a secure broadcast message that is encrypted such that the mobile devices of the group receiving on the channel can receive and decrypt the secure broadcast message using the key material.

Abstract: A photographing lens assembly includes seven lens elements which are, in order from an object side to an image side: a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element, a sixth lens element and a seventh lens element. The second lens element has positive refractive power. The seventh lens element has an image-side surface being concave in a paraxial region thereof, and the image-side surface of the seventh lens element has at least one convex shape in an off-axis region thereof.

Abstract: The present invention relates to a balance structure of a fan rotor, which comprises a fan wheel and a balancing part. The fan wheel has a hub and a plurality of blades disposed on the circumferential side of the hub. The hub has a top wall connected to a sidewall. An unbalanced portion is selectively disposed on the top wall or on the sidewall. The unbalanced portion is disposed on one side of a symmetrical axis of the hub. The balancing part is disposed at the unbalanced portion such that the fan rotor is balanced.

Abstract: This invention discloses a circuit encoding method and a circuit structure recognition method. The circuit encoding method is applied to a circuit structure recognition process of a circuit. The circuit is coupled to a voltage source and a reference voltage. The circuit encoding method includes: selecting a target transistor from the circuit; when a terminal of the target transistor is electrically connected to the voltage source or the reference voltage, adding a first value to a terminal value of the terminal; when the terminal of the target transistor is electrically connected to a terminal other than the voltage source and the reference voltage, adding a second value to the terminal value of the terminal; and taking a set of multiple terminal values of the target transistor as a transistor signature of the target transistor.

Abstract: A method for aligning an inhomogeneous receiver with an anisotropic emitter on a wafer probing system, wherein a reference semiconductor die comprising a reference pad and an anisotropic emitter is formed on a semiconductor wafer, the reference pad is located at a reference-pad-and-anisotropic-emitter relative position corresponding to the anisotropic emitter, the method comprises following steps of: measuring a receiver center position of an inhomogeneous receiver configured on a wafer probing system by a profile sensor; measuring a reference tip position of a reference tip of a reference probe on a probe card by a measuring instrument; displacing the inhomogeneous receiver in an aligning displacement according to the reference-pad-and-anisotropic-emitter relative position, the reference tip position and the receiver center position; and aligning the reference tip with the reference pad by a probe-tip-and-pad aligning machine of the wafer probing system.

Abstract: A liquid crystal composition having one or more compounds represented by formula I, one or more compounds represented by formula II and one or more compounds represented by formula III: The liquid crystal composition has a good stability against light and heat and a lower viscosity, and can achieve a wider refractive index and higher clearing point by the adjustment the ratio of the monomers. In particular, the liquid crystal composition has a higher light transmittance, allowing a display device to have a higher brightness or an energy saving effect.

Abstract: Disclosed are some implementations of systems, apparatus, methods and computer program products for publisher and share action integration in a user interface (UI) for automated messaging. In some implementations, information is displayed in a first component and in a second component in a UI on a display. The first component is a publisher configured for composing and sharing messages on different communication channels using different share actions. The second component includes links to data items. When one of the data items is selected, a set of share actions for sharing the selected item using the publisher can be identified and displayed. When one of the displayed share actions is selected, it can be determined that the selected share action is applicable to one of the communication channels. A reference to the selected item can be provided in a message being composed in the publisher for sharing on the one communication channel.

Abstract: A magnetic bearing centrifugal compressor includes a magnetic bearing spindle having a thrust disk, front and rear axial bearings, an impeller and at least one labyrinth seal. The front and the rear axial bearings are disposed individually to opposing sides of the thrust disk. First and second clearances exist axially between the rear and front axial bearings, respectively, and the thrust disk. The impeller connects a front end of the magnetic bearing spindle. The labyrinth seal pairs the magnetic bearing spindle into an oblique arrangement with respect to the axial direction, and each the labyrinth seal is spaced from the magnetic bearing spindle or the impeller by a labyrinth-seal clearance. By controlling the thrust disk axially, a clearance ratio of the first clearance to the second clearance can be varied to adjust the labyrinth-seal clearance. In addition, a magnetic bearing centrifugal compressor controlling method is also provided.

Abstract: A method for storing data for identifying fabric information, comprises: dividing the fabric information into N types of data information according to information types, and storing the N types of data information on a data carrier in a form of codes respectively, wherein different codes in a same type of data information represent different pieces of the fabric information defined specifically. The fabric information is classified according to information types, and each type of data information represents specific defined information in the form of codes, thereby saving the storage space occupied by the fabric information. Also disclosed is a data carrier which can store a large amount of fabric information with a small space, the data carrier can acquire codes stored in the data carrier through identification by a corresponding identifier, and the identifier can further acquire specific fabric information according to the codes.

Abstract: A non-destructive memory array implements a full adder. The array includes a column connected by a bit line and a full adder unit. The column stores a first bit in a first row of the bit line, a second bit in a second row of the bit line, and an inverse of a carry-in bit in a third row of the bit line. The full adder unit stores, in the second and third rows of the bit line, a sum bit and a carry out bit output, respectively, of adding the first bit, the second bit and the carry-in bit. The full adder unit does not overwrite any of the bits when a full adder table indicates that the sum bit and the carry out bit are equivalent to the second bit and the carry-in bit.

Abstract: A gate cut isolation including an air gap and an IC including the same are disclosed. A method of forming the gate cut isolation may include forming an opening in a dummy gate that extends over a plurality of spaced active regions, the opening positioned between and spaced from a pair of active regions. The opening is filled with a fill material, and the dummy gate is removed. A metal gate is formed in a space vacated by the dummy gate on each side of the fill material, and the fill material is removed to form a preliminary gate cut opening. A liner is deposited in the preliminary gate cut opening, creating a gate cut isolation opening, which is then sealed by depositing a sealing layer. The sealing layer closes an upper end of the gate cut isolation opening and forms the gate cut isolation including an air gap.

Abstract: Disclosed are systems, methods, and apparatuses for providing a high-speed data path to storage devices. In one embodiment, a method is disclosed comprising receiving, by the processor, a data access command, the data access command specifying a location in memory to access data; issuing, by the processor, the data access command to the storage device via a first datapath, the first datapath comprising a non-block datapath; and accessing, by the processor, the non-volatile storage component through the first datapath and the memory, wherein the non-volatile storage component of the storage device is mapped to memory accessible by the processor.

Abstract: A system and method is directed to charging and discharging an energy-tank capacitor of a power supply unit (PSU) in a computing system. The PSU has a forward converter, a buck converter, a switch box, and an option box. The forward converter has a transformer. A primary winding of the transformer is coupled to an input of the PSU, while a secondary winding of the transformer is coupled to an output of the PSU. Two or more components of the forward converter are shared with the buck converter to support the functionality of the buck converter when it is enabled. The switch box has a power switch and a controller switch connected to the forward converter. The energy stored on the energy-tank capacitor is capable of supporting power consumption of the server system during a hold-up time, when an input power to the PSU is interrupted.

Abstract: A method includes removing a dummy gate structure formed over a first fin and a second fin, forming an interfacial layer in the first trench and the second trench, forming a first high-k dielectric layer over the interfacial layer in the first trench and the second trench, removing the first high-k dielectric layer in the second trench, forming a self-assembled monolayer over the first high-k dielectric layer in the first trench, forming a second high-k dielectric layer over the self-assembled monolayer in the first trench and over the interfacial layer in the second trench, forming a work function metal layer in the first and the second trenches, and forming a bulk conductive layer over the work function metal layer in the first and the second trenches. In some embodiments, the first high-k dielectric layer includes lanthanum and oxygen.

Abstract: Disclosed is an IC voltage determining method including: executing a static timing analysis according to a circuit design to obtain data of a critical path and then generating a netlist; executing a circuit parameter simulation and Monte Carlo simulation with the netlist according to a regular voltage and prescribed parameters to obtain a circuit parameter reference value and a variance of circuit parameter values; executing an adaptive voltage scaling analysis according to a voltage range to obtain a voltage-versus-parameter relation indicative of the number of times that each of circuit parameter deviations that are respectively associated with predetermined voltages within the predetermined voltage range is of the variance; and testing an IC according to the regular voltage to obtain a circuit parameter test value and determining the IC voltage according to the voltage-versus-parameter relation and a difference between the circuit parameter test value and the circuit parameter reference value.