Abstract: The present invention provides a cyclic redundancy check (CRC) calculation system for a packet arriving on an n-byte wide bus. In one embodiment, the system includes a bus-wide CRC subsystem configured to calculate an intermediate CRC value based on complete segments of the packet. In addition, the system includes a byte-wide CRC subsystem, coupled to the bus-wide subsystem, configured to calculate a remaining CRC value based on the intermediate CRC value and one or more bytes within an incomplete segment of the packet on a byte by byte basis. In addition, a method of calculating a CRC value for a packet arriving on a n-byte wide bus and a data transmission system incorporating the system are also disclosed.

Abstract: The present invention provides a cyclic redundancy check (CRC) calculation system for a packet arriving on an n-byte wide bus. In one embodiment, the system includes a bus-wide CRC subsystem configured to calculate an intermediate CRC value based on complete segments of the packet. In addition, the system includes a byte-wide CRC subsystem, coupled to the bus-wide subsystem, configured to calculate a remaining CRC value based on the intermediate CRC value and one or more bytes within an incomplete segment of the packet on a byte by byte basis. In addition, a method of calculating a CRC value for a packet arriving on a n-byte wide bus and a data transmission system incorporating the system are also disclosed.

Abstract: A processor is connected to one or more controlled devices (e.g., ASICS) using an interface that has a plurality of bandwidth distribution devices (i.e., a controller device and one or more adjunct devices) configured in an architecture having two or more levels. Each bandwidth distribution device receives an allocation of address bandwidth from a device in the next higher level and distributes that allocation of address bandwidth to one or more devices in the next lower level, each of which is either another bandwidth distribution device or a controlled device. Each bandwidth distribution device can be configured independently in different configuration modes that determine how its available address bandwidth is distributed to devices in the next lower level. The different configuration modes allow the number of devices in the next lower level to be traded off with the amount of bandwidth available to a particular device in the next lower level.