Patents by Inventor Shu-Chang Kuo

Shu-Chang Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240165181
    Abstract: A composition for inhibiting intestinal permeability, treating leaky gut related diseases and/or preventing leaky gut related diseases including a Chinese herbal compound material or a Chinese herbal compound extract is provided. The Chinese herbal compound material includes Ganoderma, red jujube, longan and lotus seed. Moreover, the Chinese herbal compound extract includes a Ganoderma extract, a red jujube extract, a longan extract and a lotus seed extract.
    Type: Application
    Filed: June 1, 2023
    Publication date: May 23, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: I-Hong PAN, Kuei-Chang LI, Zong-Keng KUO, Chu-Hsun LU, Yen-Wu HSIEH, Shu-Fang WEN
  • Patent number: 7242231
    Abstract: Clock generators capable of generating clocks with different frequency according to a binary code. A voltage controlled oscillation module generates a plurality of first clocks (D0˜Dm) with a first frequency (f0), in which the first clocks Di and Di-1 have a fixed phase difference and 1<i<m. A logic control circuit outputs a set of corresponding clocks arranged in a corresponding sequence according to the first clocks and a binary code. A clock synthesizer generates a second clock with a second frequency (f1) according to the set of corresponding clocks, in which f1=A/B f0, A<B and A and B are positive integers.
    Type: Grant
    Filed: September 23, 2005
    Date of Patent: July 10, 2007
    Assignee: Industrial Technology Research Institute
    Inventors: Shu-Chang Kuo, Wei-Bin Yang, Kuo-Hsing Cheng
  • Publication number: 20060290392
    Abstract: Clock generators capable of generating clocks with different frequency according to a binary code. A voltage controlled oscillation module generates a plurality of first clocks (D0˜Dm) with a first frequency (f0), in which the first clocks Di and Di?1 have a fixed phase difference and 1<i<m. A logic control circuit outputs a set of corresponding clocks arranged in a corresponding sequence according to the first clocks and a binary code. A clock synthesizer generates a second clock with a second frequency (f1) according to the set of corresponding clocks, in which f ? ? ? 1 = A B ? f ? ? ? 0 , A>B and A and B are positive integers.
    Type: Application
    Filed: September 23, 2005
    Publication date: December 28, 2006
    Inventors: Shu-chang Kuo, Wei-Bin Yang, Kuo-Hsing Cheng