Abstract: A method for fabricating semiconductor devices includes forming channel regions over a substrate. The channel regions, in parallel with one another, extend along a first lateral direction. Each channel region includes at least a respective pair of epitaxial structures. The method includes forming a gate structure over the channel regions, wherein the gate structure extends along a second lateral direction. The method includes removing, through a first etching process, a portion of the gate structure that was disposed over a first one of the channel regions. The method includes removing, through a second etching process, a portion of the first channel region. The second etching process includes one silicon etching process and one silicon oxide deposition process. The method includes removing, through a third etching process controlled based on a pulse signal, a portion of the substrate that was disposed below the removed portion of the first channel region.

Abstract: A method for making a semiconductor structure includes: providing a substrate with a contact feature thereon; forming a dielectric layer on the substrate; etching the dielectric layer to form an interconnect opening exposing the contact feature; forming a metal layer on the dielectric layer and outside of the contact feature; and forming a graphene conductive structure on the metal layer, the graphene conductive structure filling the interconnect opening, being electrically connected to the contact feature, and having at least one graphene layer that extends in a direction substantially perpendicular to the substrate.

Abstract: A semiconductor structure includes a dielectric layer over a substrate, a via conductor over the substrate and in the dielectric layer, and a first graphene layer disposed over the via conductor. In some embodiments, a top surface of the via conductor and a top surface of the dielectric layer are level. In some embodiments, the first graphene layer overlaps the via conductor from a top view. In some embodiments, the semiconductor structure further includes a second graphene layer under the via conductor and a third graphene layer between the dielectric layer and the via conductor. In some embodiments, the second graphene layer is between the substrate and the via conductor.

Abstract: A method for manufacturing a semiconductor structure includes forming a first interconnect feature in a first dielectric feature, the first interconnect feature including a first conductive element exposed from the first dielectric feature; forming a first cap feature over the first conductive element, the first cap feature including a first cap element which includes a two-dimensional material; forming a second dielectric feature with a first opening that exposes the first cap element; forming a barrier layer over the second dielectric feature while exposing the first cap element from the barrier layer; removing a portion of the first cap element exposed from the barrier layer; and forming a second conductive element in the first opening.

Abstract: A photographing optical lens assembly includes, in order from an object side to an image side along an optical axis, a first lens element, a second lens element, a third lens element, a fourth lens element and a fifth lens element. The first lens element has positive refractive power. The second lens element has negative refractive power. The third lens element has an object-side surface being convex in a paraxial region thereof.

Abstract: The present invention provides smart bed systems and the operating methods of the smart bed systems. The smart bed systems detect physiological data and sleeping quality with optical fibers which with strong resistance to electromagnetic interference. The smart bed systems do not require the users to wear any wearable devices. The smart bed systems also provide several functions, such as automatic night light, vibration-based alarm, anti-snoring assistance, and scenario-based appliance controls.

Abstract: The present invention provides smart bed systems and the operating methods of the smart bed systems. The smart bed systems detect physiological data and sleeping quality with optical fibers which with strong resistance to electromagnetic interference. The smart bed systems do not require the users to wear any wearable devices. The smart bed systems also provide several functions, such as automatic night light, vibration-based alarm, anti-snoring assistance, and scenario-based appliance controls.

Abstract: A compact projector includes a main control board, an optical engine positioned on the main control board, a heat dissipation assembly, a light source control board, and a digital-micromirror-device control board. The optical engine includes a light-shading member and a projection lens module. The light-shading member includes a first plate and a second plate. The first plate and the projection lens module are approximately perpendicular to the second plate to form a U-shape. The heat dissipation assembly is positioned adjacent to the first plate. The light source control board is positioned on one side of the main control board adjacent to the second plate. The digital-micromirror-device control board is positioned on one side of the main control board perpendicular to the light source control board.

Abstract: A compact projector includes a main control board, an optical engine positioned on the main control board, a heat dissipation assembly, a light source control board, and a digital-micromirror-device control board. The optical engine includes a light-shading member and a projection lens module. The light-shading member includes a first plate and a second plate. The first plate and the projection lens module are approximately perpendicular to the second plate to form a U-shape. The heat dissipation assembly is positioned adjacent to the first plate. The light source control board is positioned on one side of the main control board adjacent to the second plate. The digital-micromirror-device control board is positioned on one side of the main control board perpendicular to the light source control board.

Abstract: A method for fabricating a conductive layer is provided. First, a substrate is provided and a patterned adhesion layer is formed on the substrate. Next, a chemical plating process is performed to form a first metal layer on the patterned adhesion layer by placing the substrate in an electroplating solution and the electroplating solution is shocked. Thereafter, a second metal layer is formed on the first metal layer by performing a plating process.

Abstract: A method for fabricating a conductive layer is provided. First, a substrate is provided and a patterned adhesion layer is formed on the substrate. Next, a chemical plating process is performed to form a first metal layer on the patterned adhesion layer by placing the substrate in an electroplating solution and the electroplating solution is shocked. Thereafter, a second metal layer is formed on the first metal layer by performing a plating process.

Abstract: A thin film transistor and a fabrication method thereof are provided. First, a gate is formed on a substrate. Next, a gate insulating layer is formed to cover the gate and then a channel layer is formed on a portion of the gate insulating layer above the gate. Afterwards, a source and a drain are formed on the channel layer. The method of forming the gate includes forming a copper alloy layer containing nitrogen and a copper layer sequentially and then removing a portion of the copper alloy layer containing nitrogen and the copper layer. The source and the drain could be formed by the same fabrication method.

Abstract: A leadframe includes a die pad, a plurality of tie bars, a plurality of metal extrusions and a plurality of leads. The leads are arranged around the die pad. The tie bars are connected to the corners of the die pad, and the metal extrusions are connected to the sides of the die pad but separated from the tie bars. Each metal extrusion has a locking hole and a bonding surface, which is higher than the die pad. The metal extrusions are configured for improving ground connections by wire-bonding. When a bottom surface of the die pad is exposed from an encapsulant for a semiconductor package, the metal extrusions help to secure the die pad without stress transmission.

Abstract: A dual-band antenna for communication device includes a first dipole antenna, a second dipole antenna and a coaxial feed line. The first dipole antenna includes a first radiating element disposed at a first plane and a first ground portion disposed at a second plane. The second dipole antenna includes a second radiating element disposed at a first plane and a second ground portion disposed at a second plane. The feed line includes an inner conductor electrically connecting to the first and second radiating elements and an outer conductor electrically connecting to the first and second ground portions. The first and second radiating elements both further include a compensating portion for improving radiating patterns of the first and second dipole antennas and a broadband portion for increasing frequency bands of the first and second dipole antennas.

Abstract: A dual-band antenna for communication device includes a first dipole antenna, a second dipole antenna and a coaxial feed line. The first dipole antenna includes a first radiating element disposed at a first plane and a first ground portion disposed at a second plane. The second dipole antenna includes a second radiating element disposed at a first plane and a second ground portion disposed at a second plane. The feed line includes an inner conductor electrically connecting to the first and second radiating elements and an outer conductor electrically connecting to the first and second ground portions. The first and second radiating elements both further include a compensating portion for improving radiating patterns of the first and second dipole antennas and a broadband portion for increasing frequency bands of the first and second dipole antennas.

Abstract: A leadframe includes a die pad, a plurality of tie bars, a plurality of metal extrusions and a plurality of leads. The leads are arranged around the die pad. The tie bars are connected to the corners of the die pad, and the metal extrusions are connected to the sides of the die pad but separated from the tie bars. Each metal extrusion has a locking hole and a bonding surface, which is higher than the die pad. The metal extrusions are configured for improving ground connections by wire-bonding. When a bottom surface of the die pad is exposed from an encapsulant for a semiconductor package, the metal extrusions help to secure the die pad without stress transmission.

Abstract: A cable connector assembly (3) includes a housing (31), a number of contacts, a cable (33), and a enclosure (32). The housing has a mating face (310), an outer side face (315), a receiving space (311) defined in the mating face, a number of passageways (312) in communicating with the receiving space, and a guiding post (313) formed on the outer face and extending along the outer face in a mating direction. The contacts are received in the passageways. The cable electrically connects with the contacts. The enclosure encloses the housing, the contacts, and the cable. The closure has an outer side wall (321), and a positioning post (322) formed on the outer side wall and extending in the mating direction of the cable connector assembly.

Abstract: An electrical connector (1) mates with a complementary connector for transmitting signals. The electrical connector includes a metallic shell (10), a conductive contact (12) and an insulative housing (11) sandwiched between the shell and the conductive contact for retaining the conductive contact. The metallic shell includes a mating portion (101) and a base portion (102) extending from the base portion. A projection (103) integrally protrudes outwardly from the mating portion adjacent to the base portion for engaging with the complementary connector. The mating portion includes a plurality of slits (106) defined therethrough.

Abstract: A cable connector assembly (3) includes a housing (31), a number of contacts, a cable (33), and an enclosure (32). The housing has a mating face (310), an outer side face (315), a receiving space (311) defined in the mating face, a number of passageways (312) in communicating with the receiving space, and a guiding post (313) formed on the outer face and extending along the outer face in a mating direction. The contacts are received in the passageways. The cable electrically connects with the contacts. The enclosure encloses the housing, the contacts, and the cable. The enclosure has an outer side wall (321), and a positioning post (322) formed on the outer side wall and extending in the mating direction of the cable connector assembly.