Patents by Inventor Shu-Ching Ho

Shu-Ching Ho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7973310
    Abstract: Semiconductor package structures and methods for manufacturing the same are provided. The semiconductor package structure comprises a substrate unit and a first chip stack structure. The substrate unit comprises a circuit structure having test pads. The first chip stack structure comprises chips, and each of the chips has a plurality of through silicon plugs. The through silicon plugs of two adjacent chips are electrically connected and further electrically connected to the test pads of the substrate unit for electrical testing. Another semiconductor package structure provided by the present invention comprises a first semiconductor chip and a second semiconductor chip. Each of the semiconductor chips has test pads for electrical testing and a plurality of through silicon plugs connecting to the test pads. The second semiconductor chip is mounted on the first semiconductor chip, and a portion of the through silicon plugs of two semiconductor chips are electrically connected with each other.
    Type: Grant
    Filed: July 10, 2009
    Date of Patent: July 5, 2011
    Assignee: Chipmos Technologies Inc.
    Inventors: David Wei Wang, An-Hong Liu, Hao-Yin Tsai, Hsiang-Ming Huang, Yi-Chang Lee, Shu-Ching Ho
  • Patent number: 7871592
    Abstract: A method for preparing a carbon/carbon (C/C) composite comprising carbonizing a carbon fiber-reinforced polymer matrix composite precursor by heating the precursor in an inert atmosphere with a heating rate greater than 20° C./min up to 1500° C./min.
    Type: Grant
    Filed: December 27, 2005
    Date of Patent: January 18, 2011
    Inventors: Jiin-Huey Chern Lin, Chien-Ping Ju, Hua-Hsuan Kuo, Shu-Ching Ho, Seng-Meng Chen
  • Publication number: 20100007001
    Abstract: Semiconductor package structures and methods for manufacturing the same are provided. The semiconductor package structure comprises a substrate unit and a first chip stack structure. The substrate unit comprises a circuit structure having test pads. The first chip stack structure comprises chips, and each of the chips has a plurality of through silicon plugs. The through silicon plugs of two adjacent chips are electrically connected and further electrically connected to the test pads of the substrate unit for electrical testing. Another semiconductor package structure provided by the present invention comprises a first semiconductor chip and a second semiconductor chip. Each of the semiconductor chips has test pads for electrical testing and a plurality of through silicon plugs connecting to the test pads. The second semiconductor chip is mounted on the first semiconductor chip, and a portion of the through silicon plugs of two semiconductor chips are electrically connected with each other.
    Type: Application
    Filed: July 10, 2009
    Publication date: January 14, 2010
    Inventors: David Wei Wang, An-Hong Liu, Hao-Yin Tsai, Hsiang-Ming Huang, Yi-Chang Lee, Shu-Ching Ho
  • Publication number: 20090283905
    Abstract: A conductive structure of a chip is provided. The conductive structure comprises a ground layer, a dielectric layer, a redistribution layer, an under bump metal and a solder bump. The ground layer electrically connects to the ground pad of the chip, while the dielectric layer overlays the ground layer. Thus, the conductive layer can result in impedance matching, and the packaged chip is adapted to transmit a high frequency signal.
    Type: Application
    Filed: October 31, 2008
    Publication date: November 19, 2009
    Inventors: Hsiang-Ming HUANG, An-Hong Liu, Yi-Chang Lee, Hao-Yin Tsai, Shu-Ching Ho
  • Publication number: 20090236741
    Abstract: A conductive structure of a chip and a method for manufacturing the conductive structure are provided. An under bump metal (UBM) is formed on the redistribution layer (RDL) by performing an electroless plating process. Subsequently, the solder bump is formed on the under bump metal for electrical connection. Thus, the photomask can be economized and the cost of manufacturing can be reduced.
    Type: Application
    Filed: October 31, 2008
    Publication date: September 24, 2009
    Inventors: Hsiang-Ming HUANG, An-Hong Liu, Yi-Chang Lee, Hao-Yin Tsai, Shu-Ching Ho
  • Publication number: 20080124828
    Abstract: MEMS processes for fabrication of a MEMS alloy probe are revealed. Multiple layers of the MEMS alloy probe are formed on the substrate in sequences as a first surface layer, a first conductive layer, a core layer, a second conductive layer, and a second surface layer where the width of the first conductive layer is smaller than the one of first surface layer so that all the exposed edges of the first surface layer are not covered by the first conductive layer. The second surface layer is extended from the sidewalls of the core layer to the exposed edges of the first surface layer to encapsulate the core layer, the first conductive layer, and the second conductive layer. The MEMS alloy probe fabricated by the MEMS processes can eliminate the issue of oxidation.
    Type: Application
    Filed: November 20, 2006
    Publication date: May 29, 2008
    Inventors: Hsiang-Ming Huang, An-Hong Liu, Shu-Ching Ho, Yi-Chang Lee, Yeong-Jyh Lin
  • Publication number: 20080090941
    Abstract: A process for preparing a semi-metallic friction material having improved thermal resistance includes preparing a semi-metallic composition containing (i) at least one carbonizable thermosetting resin as a binder; and (ii) at least one transition metal powder having a melting point higher than 1000° C. and density less than 10 g/ml; thermoforming said semi-metallic composition by curing said thermosetting resin; and heat-treating the resulting thermoformed product at a temperature of about 100 to 1000° C., preferably 200-600° C., to semi-carbonize said cured thermosetting resin.
    Type: Application
    Filed: December 27, 2005
    Publication date: April 17, 2008
    Applicant: Chien-Ping JU
    Inventors: Jiin-Huey Lin, Chien-Ping Ju, Shu-Ching Ho
  • Publication number: 20080025906
    Abstract: A method for preparing a carbon/carbon (C/C) composite comprising carbonizing a carbon fiber-reinforced polymer matrix composite precursor by heating the precursor in an inert atmosphere with a heating rate greater than 20° C./min up to 1500° C./min.
    Type: Application
    Filed: December 27, 2005
    Publication date: January 31, 2008
    Applicants: Jiin-Huey Chern LIN, Chien-Ping JU
    Inventors: Jiin-Huey Chern Lin, Chien-Ping Ju, Hua-Hsuan Kuo, Shu-Ching Ho, Seng-Meng Chen