Patents by Inventor Shu-chung Yi

Shu-chung Yi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Chinese abacus adder
    Patent number: 7870181
    Abstract: A Chinese abacus adder is disclosed. The Chinese abacus adder includes a B/A (binary to abacus) circuit, a P/A (parallel addition) circuit and a T/B (thermometric to binary) circuit. The Chinese abacus adder has a multiple radix calculating structure, which could reduce power consumption of the system and lower the calculation delay time.
    Type: Grant
    Filed: May 14, 2007
    Date of Patent: January 11, 2011
    Assignee: National Changhua University of Education
    Inventors: Shu-Chung Yi, Zih-Yi Jhao, Yu-Jhih Ye, Yen-Ju Chen, Yi-Jie Lin, Chien-Hung Lin
  • CHINESE ABACUS ADDER
    Publication number: 20080118898
    Abstract: A Chinese abacus adder is disclosed. The Chinese abacus adder includes a B/A (binary to abacus) circuit, a P/A (parallel addition) circuit and a T/B (thermometric to binary) circuit. The Chinese abacus adder has a multiple radix calculating structure, which could reduce power consumption of the system and lower the calculation delay time.
    Type: Application
    Filed: May 14, 2007
    Publication date: May 22, 2008
    Applicant: NATIONAL CHANGHUA UNIVERSITY OF EDUCATION
    Inventors: SHU-CHUNG YI, ZIH-YI JHAO, YU-JHIH YE, YEN-JU CHEN, YI-JIE LIN, CHIEN-HUNG LIN
  • PWM controller for controlling output power limit of a power supply
    Patent number: 6611439
    Abstract: A PWM controller has a line voltage input that allows using an input resistor for both start-up and power-limit compensation, thus saving the power consumption, easing the PCB layout, and shrinking the power supply size. In the integrated circuit, a mirrored-resistor used for the power limit compensation is composed of a mirror MOSFET, which is associated with an op amplifier, a constant voltage and a constant current to provide a precise resistance. Thus, by properly selecting the value of the input resistor, an identical output power limit for low line and high line voltage input can be achieved.
    Type: Grant
    Filed: October 28, 2002
    Date of Patent: August 26, 2003
    Assignee: System General Corporation
    Inventors: Ta-yung Yang, Jenn-yu G. Lin, Shu-chung Yi