Patents by Inventor Shu-Ling Chang

Shu-Ling Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11320809
    Abstract: A factory management system and control system are provided. The factory management system includes: a machine; multiple sensors disposed corresponding to the machine and generates multiple first sensing data; a server; and a control system coupled to the machine and the server. The control system receives the first sensing data to generate multiple corresponding control commands in real time and transmits the control commands to the machine. The control system receives a user login message and receives multiple second sensing data and displays the second sensing data in a user login status. The control system receives a user control command and transmits a second control command corresponding to the user control command to the machine. When the control system determines that an abnormal condition occurs according to the second sensing data in the user login status, the control system sends a warning message.
    Type: Grant
    Filed: April 29, 2020
    Date of Patent: May 3, 2022
    Assignee: Grade Upon Technology Corporation
    Inventors: Tai-Yu Fang, Shu-Ling Chang, Wei Chang
  • Publication number: 20210034041
    Abstract: A factory management system and control system are provided. The factory management system includes: a machine; multiple sensors disposed corresponding to the machine and generates multiple first sensing data; a server; and a control system coupled to the machine and the server. The control system receives the first sensing data to generate multiple corresponding control commands in real time and transmits the control commands to the machine. The control system receives a user login message and receives multiple second sensing data and displays the second sensing data in a user login status. The control system receives a user control command and transmits a second control command corresponding to the user control command to the machine. When the control system determines that an abnormal condition occurs according to the second sensing data in the user login status, the control system sends a warning message.
    Type: Application
    Filed: April 29, 2020
    Publication date: February 4, 2021
    Applicant: Grade Upon Technology Corporation
    Inventors: Tai-Yu Fang, Shu-Ling Chang, Wei Chang
  • Patent number: 8278736
    Abstract: An electrostatic discharge protection device coupled between a first power line and a second power line is provided. A first N-type doped region is formed in a P-type well. A first P-type doped region is formed in the first N-type doped region. A second P-type doped region includes a first portion and a second portion. The first portion of the second P-type doped region is formed in the first N-type doped region. The second portion of the second P-type doped region is formed outside of the first N-type doped region. A second N-type doped region is formed in the first portion of the second P-type doped region. The first P-type doped region, the first N-type doped region, the second P-type doped region and the second N-type doped region constitute an insulated gate bipolar transistor (IGBT).
    Type: Grant
    Filed: September 3, 2010
    Date of Patent: October 2, 2012
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Yeh-Ning Jou, Chia-Wei Hung, Shu-Ling Chang, Hwa-Chyi Chiou, Yeh-Jen Huang
  • Patent number: 8278715
    Abstract: An ESD protection structure is disclosed. A substrate comprises a first conductive type. A first diffusion region is formed in the substrate. A first doped region is formed in the first diffusion region. A second doped region is formed in the first diffusion region. A third doped region is formed in the substrate. A first isolation region is formed in the substrate, covers a portion of the first diffusion region and is located between the second and the third doped regions. A fourth doped region is formed in the substrate. When the first doped region is coupled to a first power line and the third and the fourth doped regions are coupled to a second power line, an ESD current can be released to the second power line from the first power line. During the release of the ESD current, the second doped region is not electrically connected to the first power line.
    Type: Grant
    Filed: February 2, 2011
    Date of Patent: October 2, 2012
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Yeh-Ning Jou, Chia-Wei Hung, Hwa-Chyi Chiou, Yeh-Jen Huang, Shu-Ling Chang
  • Publication number: 20120193718
    Abstract: An ESD protection structure is disclosed. A substrate comprises a first conductive type. A first diffusion region is formed in the substrate. A first doped region is formed in the first diffusion region. A second doped region is formed in the first diffusion region. A third doped region is formed in the substrate. A first isolation region is formed in the substrate, covers a portion of the first diffusion region and is located between the second and the third doped regions. A fourth doped region is formed in the substrate. When the first doped region is coupled to a first power line and the third and the fourth doped regions are coupled to a second power line, an ESD current can be released to the second power line from the first power line. During the release of the ESD current, the second doped region is not electrically connected to the first power line.
    Type: Application
    Filed: February 2, 2011
    Publication date: August 2, 2012
    Inventors: Yeh-Ning JOU, Chia-Wei Hung, Hwa-Chyi Chiou, Yeh-Jen Huang, Shu-Ling Chang
  • Publication number: 20120056239
    Abstract: An electrostatic discharge protection device is coupled between a first power line and a second power line and comprises a P-type well, a first N-type doped region, a first P-type doped region, a second P-type doped region and a second N-type doped region. The first N-type doped region is formed in the P-type well. The first P-type doped region is formed in the first N-type doped region. The second P-type doped region comprises a first portion and a second portion. The first portion of the second P-type doped region is formed in the first N-type doped region. The second portion of the second P-type doped region is formed outside of the first N-type doped region. The second N-type doped region is formed in the first portion of the second P-type doped region. The first P-type doped region, the first N-type doped region, the second P-type doped region and the second N-type doped region constitute an insulated gate bipolar transistor (IGBT).
    Type: Application
    Filed: September 3, 2010
    Publication date: March 8, 2012
    Inventors: Yeh-Ning JOU, Chia-Wei Hung, Shu-Ling Chang, Hwa-Chyi Chiou, Yeh-Jen Huang