Abstract: A substrate structure is disclosed. The substrate structure includes a core substrate, an interconnection portion and a solder mask. The core substrate includes a top surface and a bottom surface opposite the top surface. A circuit pattern is disposed on the top surface. The interconnection portion is disposed on the top surface; herein the interconnection portion includes a surface dielectric layer and a surface circuit layer disposed on the surface dielectric layer. The surface circuit layer is electrically connected to the circuit pattern. The solder mask is disposed on the interconnection portion; herein the solder mask includes a hole to identify the substrate structure. Besides, a method for manufacturing the substrate structure is disclosed.

Abstract: A substrate structure is disclosed. The substrate structure includes a core substrate, an interconnection portion and a solder mask; herein the core substrate includes a top surface and a bottom surface opposite the top surface. A circuit pattern is disposed on the top surface. The interconnection portion is disposed on the top surface; herein the interconnection portion includes a surface dielectric layer and a surface circuit layer disposed thereon. The surface circuit layer is electrically connected to the circuit pattern, and the surface dielectric layer includes at least a hole that is not covered with the surface circuit layer. The solder mask is disposed on the interconnection portion; herein the solder mask includes an indentation disposed above the hole. In addition, a method for manufacturing the substrate structure is disclosed.

Abstract: A substrate structure is disclosed. The substrate structure includes a core substrate, an interconnection portion and a solder mask; herein the core substrate includes a top surface and a bottom surface opposite the top surface. A circuit pattern is disposed on the top surface. The interconnection portion is disposed on the top surface; herein the interconnection portion includes a surface dielectric layer and a surface circuit layer disposed thereon. The surface circuit layer is electrically connected to the circuit pattern, and the surface dielectric layer includes at least a hole that is not covered with the surface circuit layer. The solder mask is disposed on the interconnection portion; herein the solder mask includes an indentation disposed above the hole. Besides, a method for manufacturing the substrate structure is disclosed.

Abstract: A substrate structure is disclosed. The substrate structure includes a core substrate, an interconnection portion and a solder mask. The core substrate includes a top surface and a bottom surface opposite the top surface. A circuit pattern is disposed on the top surface. The interconnection portion is disposed on the top surface; herein the interconnection portion includes a surface dielectric layer and a surface circuit layer disposed on the surface dielectric layer. The surface circuit layer is electrically connected to the circuit pattern. The solder mask is disposed on the interconnection portion; herein the solder mask includes a hole to identify the substrate structure. Besides, a method for manufacturing the substrate structure is disclosed.