Patents by Inventor Shu-Min HUANG

Shu-Min HUANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140017888
    Abstract: A salicide process is described. A substrate having thereon an insulating layer and a silicon-based region is provided. A nickel-containing metal layer is formed on the substrate. A first anneal process is performed to form a nickel-rich silicide layer on the silicon-based region. The remaining nickel-containing metal layer is stripped. A thermal recovery process is performed at a temperature of 150-250° C. for a period longer than 5 minutes. A second anneal process is performed to change the phase of the nickel-rich silicide layer and form a low-resistivity mononickel silicide layer.
    Type: Application
    Filed: July 10, 2012
    Publication date: January 16, 2014
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chia-Chang Hsu, Bor-Shyang Liao, Kuo-Chih Lai, Nien-Ting Ho, Chi-Mao Hsu, Shu-Min Huang, Min-Chung Cheng
  • Patent number: 8598033
    Abstract: The present invention provides a method for forming a salicide layer. First, a metal-atom-containing layer is formed on a substrate, a first rapid thermal process (RTP) is then performed to the metal-atom-containing layer to form a transitional salicide layer on a specific region. The metal-atom-containing layer is then removed, a thermal conductive layer is formed on the surface of the transitional salicide layer, and a second RTP is performed on the transitional salicide layer.
    Type: Grant
    Filed: October 7, 2012
    Date of Patent: December 3, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Kuo-Chih Lai, Chia Chang Hsu, Bor-Shyang Liao, Chun-Ling Lin, Shu Min Huang, Min-Chung Cheng, Chi-Mao Hsu
  • Publication number: 20130288456
    Abstract: A manufacturing method of a semiconductor device comprises the following steps. First, a substrate is provided, at least one fin structure is formed on the substrate, and a metal layer is then deposited on the fin structure to form a salicide layer. After depositing the metal layer, the metal layer is removed but no RTP is performed before the metal layer is removed. Then a RTP is performed after the metal layer is removed.
    Type: Application
    Filed: April 26, 2012
    Publication date: October 31, 2013
    Inventors: Kuo-Chih Lai, Chia Chang Hsu, Nien-Ting Ho, Bor-Shyang Liao, Shu Min Huang, Min-Chung Cheng, Yu-Ru Yang
  • Publication number: 20130273736
    Abstract: A method for fabricating metal-oxide semiconductor (MOS) transistor is disclosed. The method includes the steps of: providing a semiconductor substrate having a silicide thereon; performing a first rapid thermal process to drive-in platinum from a surface of the silicide into the silicide; and removing un-reacted platinum in the first rapid thermal process.
    Type: Application
    Filed: June 10, 2013
    Publication date: October 17, 2013
    Inventors: Kuo-Chih Lai, Nien-Ting Ho, Shu Min Huang, Bor-Shyang Liao, Chia Chang Hsu
  • Patent number: 8541303
    Abstract: A method for fabricating metal-oxide semiconductor (MOS) transistor is disclosed. The method includes the steps of: providing a semiconductor substrate having a silicide thereon; performing a first rapid thermal process to drive-in platinum from a surface of the silicide into the silicide; and removing un-reacted platinum in the first rapid thermal process.
    Type: Grant
    Filed: September 28, 2011
    Date of Patent: September 24, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Kuo-Chih Lai, Nien-Ting Ho, Shu Min Huang, Bor-Shyang Liao, Chia Chang Hsu
  • Publication number: 20130078800
    Abstract: A method for fabricating metal-oxide semiconductor (MOS) transistor is disclosed. The method includes the steps of: providing a semiconductor substrate having a silicide thereon; performing a first rapid thermal process to drive-in platinum from a surface of the silicide into the silicide; and removing un-reacted platinum in the first rapid thermal process.
    Type: Application
    Filed: September 28, 2011
    Publication date: March 28, 2013
    Inventors: Kuo-Chih Lai, Nien-Ting Ho, Shu Min Huang, Bor-Shyang Liao, Chia Chang Hsu
  • Publication number: 20130014779
    Abstract: A cleaning method of a semiconductor manufacturing process is provided. The cleaning method is applied to a semiconductor component including a plurality of material layers formed thereon. An opening is defined in the material layers, and a side wall is exposed from the opening The side wall at least includes a first material layer and a second material layer. At first, a first cleaning process is performed till a lateral etched thickness of the first material layer is equal to a lateral etched thickness of the second material layer. Then, a byproduct formed in the first cleaning process is removed.
    Type: Application
    Filed: July 13, 2011
    Publication date: January 17, 2013
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Yi-Wei CHEN, Teng-Chun TSAI, Kuo-Chih LAI, Shu-Min HUANG