Patents by Inventor Shu-Ming Liu
Shu-Ming Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230369371Abstract: Chip packages and methods for forming the same are provided. The method includes providing a substrate having a chip region and a scribe-line region surrounding the chip region and forming a dielectric layer on an upper surface of the substrate. A dummy structure is formed in the dielectric layer over the scribe-line region of the substrate and extends along edges of the chip region. The dummy structure includes a first stack of dummy metal layers and a second stack of dummy metal layers arranged concentrically from the inside to the outside. The method also includes performing a sawing process on a portion of the dielectric layer that surrounds the dummy structure, so as to form a saw opening through the dielectric layer. At least the first stack of dummy metal layers remains in the dielectric layer after the sawing process is performed.Type: ApplicationFiled: May 14, 2022Publication date: November 16, 2023Inventors: Tsang-Yu LIU, Chaung-Lin LAI, Shu-Ming CHANG
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Patent number: 11746003Abstract: A chip package includes a first die, a second die, a molding material, and a redistribution layer. The first die includes a first conductive pad. The second die is disposed on the first die and includes a second conductive pad. The molding material covers the first die and the second die. The molding material includes a top portion, a bottom portion, and an inclined portion adjoins the top portion and the bottom portion. The top portion is located on the second die, and the bottom portion is located on the first die. The redistribution layer is disposed along the top portion, the inclined portion, and the bottom portion. The redistribution layer is electrically connected to the first conductive pad and the second conductive pad.Type: GrantFiled: April 1, 2022Date of Patent: September 5, 2023Assignee: XINTEC INC.Inventors: Tsang-Yu Liu, Chaung-Lin Lai, Shu-Ming Chang
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Publication number: 20230275804Abstract: This disclosure provides a method for establishing a network connection between an intelligent baseboard management controller and a management server. The intelligent baseboard management controller is disposed on a motherboard of an electronic device. A connection configuration program is installed in the electronic device, and the electronic device executes the connection configuration program to transmit a connection information packet to the intelligent baseboard management controller. After receiving the connection information packet, the intelligent baseboard management controller parses a connection information of the management server from the connection information packet, and executes a network connection procedure according to the connection information of the management server, so that the network connection between the intelligent baseboard management controller and the management server is established.Type: ApplicationFiled: May 27, 2022Publication date: August 31, 2023Inventors: Shu-ming Chang, Shang-Ju Lin, Yi-Jung Liu
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Publication number: 20230268417Abstract: A method for forming a semiconductor structure includes providing a semiconductor substrate, forming a sacrificial layer over the semiconductor substrate, etching the sacrificial layer to form a sacrificial pattern, etching the semiconductor substrate using the sacrificial pattern as an etching mask to form an active region of the semiconductor substrate, trimming the sacrificial pattern, and replacing the trimmed sacrificial pattern with a gate electrode.Type: ApplicationFiled: April 20, 2023Publication date: August 24, 2023Inventors: Shu-Ming LEE, Yung-Han CHIU, Chia-Hung LIU, Tzu-Ming OU YANG
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Publication number: 20230230933Abstract: A chip package includes a sensing element, a dam layer, and a light transmissive cover. A surface of the sensing element has a sensing area and a conductive pad. The conductive pad is adjacent to an edge of the surface of the sensing element. The dam layer is located on the surface of the sensing element and surrounds the sensing area. The dam layer has a main portion and plural mark portions. The mark portions are respectively located in plural corners of the main portion, located in a sidewall of the main portion, respectively located on plural corners of the sensing element, respectively located on plural inner edges of the main portion, or respectively located on plural outer edges of the main portion. The light transmissive cover is located on the dam layer.Type: ApplicationFiled: December 30, 2022Publication date: July 20, 2023Inventors: Chia-Ming CHENG, Chaung-Lin LAI, Shu-Ming CHANG, Tsang-Yu LIU
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Patent number: 11702265Abstract: A packaging structure is used for carrying at least one carried object. The packaging structure includes a carrying unit and a covering member. The carrying unit includes a supporting plate, at least one first side plate connected to the edge of the supporting plate, and at least one combing member. The supporting plate has two opposite surfaces, and the first side plate is able to bend to one of the surfaces of the supporting plate, so that the carrying unit can be folded or unfolded. The first side plate is stacked on the supporting plate when the carrying unit is in the folded state, and the combing member keeps the first side plate stacked on the supporting plate. The covering member positions the carried object on the carrying unit. A delivering device is provided for clamping and positioning a plurality of the packaging structures in an upright manner.Type: GrantFiled: July 20, 2020Date of Patent: July 18, 2023Assignee: RADIANT OPTO-ELECTRONICS CORPORATIONInventors: Fang-Chun Liu, Hung-Lin Chou, Chao-Hsu Chen, Wei-Ju Chen, Shu-Juan Song, Ren-Zhu Cao, Tian-Yu Zhao, Chih-Ming Chan
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Patent number: 11664438Abstract: A method for forming a semiconductor structure includes providing a semiconductor substrate, forming a sacrificial layer over the semiconductor substrate, etching the sacrificial layer to form a sacrificial pattern, etching the semiconductor substrate using the sacrificial pattern as an etching mask to form an active region of the semiconductor substrate, trimming the sacrificial pattern, and replacing the trimmed sacrificial pattern with a gate electrode.Type: GrantFiled: November 5, 2019Date of Patent: May 30, 2023Assignee: WINBOND ELECTRONICS CORP.Inventors: Shu-Ming Lee, Yung-Han Chiu, Chia-Hung Liu, Tzu-Ming Ou Yang
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Patent number: 11655405Abstract: A method of manufacturing a cerium dioxide powder is provided. The method includes mixing a cerium salt, an amine and solvent to form a mixed solution, in which the amine includes a secondary amine, a tertiary amine or a combination thereof, and the tertiary amine is selected from the group consisting of hexamethylenetetramine, triethylenediamine and a combination thereof. A solvothermal reaction of the mixed solution is performed to form the cerium dioxide powder. The cerium dioxide powder manufactured by the method is also provided herein.Type: GrantFiled: September 11, 2015Date of Patent: May 23, 2023Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Chung-Hsin Lu, Yong-Jian Liu, Shu-Hao Huang, Chi-Ming Yang
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Publication number: 20230097158Abstract: An error calibration apparatus and method are provided. The method is adapted for calibrating a machine learning (ML) accelerator. The ML accelerator achieves computation by using an analog circuit. An error between an output value of one or more computing layers of a neural network and a corresponding corrected value is determined. The computation of the computing layers is achieved by the analog circuit. A calibration node is generated according to the error. The calibration node is located at the next layer of the computing layers. The calibration node is used to minimize the error. The calibration node is achieved by a digital circuit. Accordingly, error and distortion of the analog circuit could be reduced.Type: ApplicationFiled: December 12, 2021Publication date: March 30, 2023Applicant: Skymizer Taiwan Inc.Inventors: Wen Li Tang, Shu-Ming Liu, Der-Yu Tsai, Po-Sheng Chang
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Publication number: 20230077991Abstract: A data processing circuit and a fault mitigating method are provided. The method is adapted for a memory having at least one fault bit. The memory provides a block for data storage. A difference between an output of a value of a plurality of bits input to at least one computing layer in a neural network and a correct value is determined. The bits are respectively considered the at least one fault bit. A repair condition is determined based on the difference. The repair condition includes a correspondence between a position where the fault bit is located in the block and at least one non-fault bit in the memory. A value of at least one non-fault bit of the memory replaces a value of the fault bit based on the repair condition.Type: ApplicationFiled: March 28, 2022Publication date: March 16, 2023Applicant: Skymizer Taiwan Inc.Inventors: Shu-Ming Liu, Kai-Chiang Wu, Chien-Fa Chen, Wen Li Tang
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Publication number: 20220342736Abstract: A data processing circuit and a fault-mitigating method are provided. In the method, multiple sub-sequences are divided from sequence data. A first sub-sequence of the sub-sequences is accessed from a memory for a multiply-accumulate (MAC) operation to obtain a first computed result. The MAC operation is performed on a second sub-sequence of the sub-sequences in the memory to obtain a second computed result. The first and the second computed results are combined, where the combined result of the first and the second computed results is related to the result of the MAC operation on the sequence data directly. Accordingly, the error rate could be reduced, so as to mitigate fault.Type: ApplicationFiled: October 25, 2021Publication date: October 27, 2022Applicant: Skymizer Taiwan Inc.Inventors: Shu-Ming Liu, Jen-ho Kuo, Wen Li Tang, Kai-Chiang Wu
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Patent number: 11461204Abstract: A data processing circuit and a fault-mitigating method, which are adapted for a memory having a faulty bit, are provided. The memory is configured to store data related to an image, a weight for a multiply-accumulate (MAC) operation of image feature extraction, and/or a value for an activation operation. Sequence data is written into the memory. The bit number of the sequence data equals to the bit number used for storing data in a sequence block of the memory. The sequence data is accessed from the memory, wherein the access of the faulty bit in the memory is ignored. The value of the faulty bit is replaced by the value of a non-faulty bit in the memory to form new sequence data. The new sequence data is used for MAC. Accordingly, the accuracy of image recognition can be improved for the faulty memory.Type: GrantFiled: March 25, 2021Date of Patent: October 4, 2022Assignee: Skymizer Taiwan Inc.Inventors: Shu-Ming Liu, Kai-Chiang Wu, Wen Li Tang
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Publication number: 20220138064Abstract: A data processing circuit and a fault-mitigating method, which are adapted for a memory having a faulty bit, are provided. The memory is configured to store data related to an image, a weight for a multiply-accumulate (MAC) operation of image feature extraction, and/or a value for an activation operation. Sequence data is written into the memory. The bit number of the sequence data equals to the bit number used for storing data in a sequence block of the memory. The sequence data is accessed from the memory, wherein the access of the faulty bit in the memory is ignored. The value of the faulty bit is replaced by the value of a non-faulty bit in the memory to form new sequence data. The new sequence data is used for MAC. Accordingly, the accuracy of image recognition can be improved for the faulty memory.Type: ApplicationFiled: March 25, 2021Publication date: May 5, 2022Applicant: Skymizer Taiwan Inc.Inventors: Shu-Ming Liu, Kai-Chiang Wu, Wen Li Tang
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Publication number: 20160217636Abstract: Access control device includes a first electronic device and a second electronic device. The first electronic device includes a storing module and a processing module. The storing module stores an information about the visitor, and the processing module processes the information to generate an identification figure. The second electronic device includes an executing module, and the executing module determines an access permission about the visitor for entering into a restricted zone, according to the identification figure. The disclosure further provides an access control method.Type: ApplicationFiled: February 6, 2015Publication date: July 28, 2016Inventors: YI-RU LAI, SHU-MING LIU, CHIA-JUNG LIU
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Publication number: 20150205395Abstract: An electronic device includes a base member and a display member rotatably coupled to the base member. A keyboard and a touchpad are located on a working surface of the base member. The touchpad includes a middle touch area, a left touch area, and a right touch area. When the touchpad works in a full touch mode, the middle touch area, the left touch area, and the right touch area are all enabled to sense and recognize touch gestures input by a user of the electronic device. When the touchpad works in a partial touch mode, at least one of the middle touch area, the left touch area, and the right touch area is disabled from sensing and recognizing touch gestures.Type: ApplicationFiled: January 21, 2014Publication date: July 23, 2015Applicant: HON HAI PRECISION INDUSTRY CO., LTD.Inventors: TAY-YANG LIN, CHIN-FENG CHEN, CHIA-JUNG LIU, SHU-MING LIU
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Publication number: 20140223551Abstract: An electronic device includes a base and a cover rotatably attached to the base. An identification unit is located on the cover. The identification unit is used to sense a gesture to rotate the cover relative to the base. The disclosure further offers a control method for the electronic device.Type: ApplicationFiled: January 22, 2014Publication date: August 7, 2014Applicant: HON HAI PRECISION INDUSTRY CO., LTD.Inventors: TAY-YANG LIN, CHIN-FENG CHEN, SHU-MING LIU, CHIA-JUNG LIU, YI-RU LAI, PO-SUNG CHUANG
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Publication number: 20140218292Abstract: An electronic device includes a touch-sensitive screen, a cursor locating module, a touch detecting module, and a user interface (UI) generating module. The cursor locating module locates a cursor in a graphical user interface (GUI) displayed on the touch-sensitive screen. The touch detecting module detects whether a point of the touch-sensitive screen corresponding to the cursor is continuously pressed for a preset time duration. When the point is continuously pressed for the preset time duration, the UI generating module generates a search UI and displays the search UI adjacent to the cursor in the GUI. A method for searching data in a touch-sensitive device is also provided.Type: ApplicationFiled: January 22, 2014Publication date: August 7, 2014Applicant: HON HAI PRECISION INDUSTRY CO., LTD.Inventors: TAY-YANG LIN, CHIN-FENG CHEN, CHIA-JUNG LIU, SHU-MING LIU
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Publication number: 20140217874Abstract: An electronic device includes a cover member rotatably connected to a base member. A magnetic lock is located on a working surface of the base member. A touch-sensitive bar is located on a side surface of the base member. When the cover member and the base member are closed, the magnetic lock provides a magnetic attraction between the cover member and the base member. When the touch-sensitive bar detects a touch gesture input by a user and the touch gesture matches a predefined touch gesture, the magnetic lock releases the magnetic attraction between the cover member and the base member.Type: ApplicationFiled: January 22, 2014Publication date: August 7, 2014Applicant: HON HAI PRECISION INDUSTRY CO., LTD.Inventors: TAY-YANG LIN, CHIN-FENG CHEN, SHU-MING LIU, CHIA-JUNG LIU, YI-RU LAI, PO-SUNG CHUANG
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Patent number: D714283Type: GrantFiled: March 26, 2013Date of Patent: September 30, 2014Assignee: Hon Hai Precision Industry Co., Ltd.Inventors: Tay-Yang Lin, Chin-Feng Chen, Chia-Jung Liu, Shu-Ming Liu, Hsin-Chih Hsu
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Patent number: D714284Type: GrantFiled: March 26, 2013Date of Patent: September 30, 2014Assignee: Hon Hai Precision Industry Co., Ltd.Inventors: Tay-Yang Lin, Chin-Feng Chen, Chia-Jung Liu, Shu-Ming Liu, Yi-Ru Lai