Patents by Inventor Shu Qin
Shu Qin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230187254Abstract: Various embodiments of microelectronic devices and methods of manufacturing are described herein. In one embodiment, a method for enhancing wafer bonding includes positioning a substrate assembly on a unipolar electrostatic chuck in direct contact with an electrode, electrically coupling a conductor to a second substrate positioned on top of the first substrate, and applying a voltage to the electrode, thereby creating a potential differential between the first substrate and the second substrate that generates an electrostatic force between the first and second substrates.Type: ApplicationFiled: February 6, 2023Publication date: June 15, 2023Inventors: Shu Qin, Ming Zhang
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Patent number: 11658033Abstract: Some embodiments include an integrated assembly having a first semiconductor structure containing heavily-doped silicon, a germanium-containing interface material over the first semiconductor structure, and a second semiconductor structure over the germanium-containing interface material. The second semiconductor structure has a heavily-doped lower region adjacent the germanium-containing interface material and has a lightly-doped upper region above the heavily-doped lower region. The lightly-doped upper region and heavily-doped lower region are majority doped to a same dopant type, and join to one another along a boundary region. Some embodiments include an integrated assembly having germanium oxide between a first silicon-containing structure and a second silicon-containing structure. Some embodiments include methods of forming assemblies.Type: GrantFiled: November 17, 2020Date of Patent: May 23, 2023Assignee: Micron Technology, Inc.Inventors: Yushi Hu, Shu Qin
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Publication number: 20230044518Abstract: In a variety of processes for forming electronic devices that use spin-on dielectric materials, properties of the spin-on dielectric materials can be enhanced by curing these materials using plasma doping. For example, hardness and Young's modulus can be increased for the cured material. Other properties may be enhanced. The plasma doping to cure the spin-on dielectric materials uses a mechanism that is a combination of plasma ion implant and high energy radiation associated with the species ionized. In addition, physical properties of the spin-on dielectric materials can be modified along a length of the spin-on dielectric materials by selection of an implant energy and dopant dose for the particular dopant used, corresponding to a selection variation with respect to length.Type: ApplicationFiled: October 21, 2022Publication date: February 9, 2023Inventors: Santanu Sarkar, Jay Steven Brown, Shu Qin, Yongjun Jeff Hu, Farrell Martin Good
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Patent number: 11574834Abstract: Various embodiments of microelectronic devices and methods of manufacturing are described herein. In one embodiment, a method for enhancing wafer bonding includes positioning a substrate assembly on a unipolar electrostatic chuck in direct contact with an electrode, electrically coupling a conductor to a second substrate positioned on top of the first substrate, and applying a voltage to the electrode, thereby creating a potential differential between the first substrate and the second substrate that generates an electrostatic force between the first and second substrates.Type: GrantFiled: August 5, 2021Date of Patent: February 7, 2023Assignee: Micron Technology, Inc.Inventors: Shu Qin, Ming Zhang
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Patent number: 11508573Abstract: In a variety of processes for forming electronic devices that use spin-on dielectric materials, properties of the spin-on dielectric materials can be enhanced by curing these materials using plasma doping. For example, hardness and Young's modulus can be increased for the cured material. Other properties may be enhanced. The plasma doping to cure the spin-on dielectric materials uses a mechanism that is a combination of plasma ion implant and high energy radiation associated with the species ionized. In addition, physical properties of the spin-on dielectric materials can be modified along a length of the spin-on dielectric materials by selection of an implant energy and dopant dose for the particular dopant used, corresponding to a selection variation with respect to length.Type: GrantFiled: May 13, 2020Date of Patent: November 22, 2022Assignee: Micron Technology, Inc.Inventors: Santanu Sarkar, Jay Steven Brown, Shu Qin, Yongjun Jeff Hu, Farrell Martin Good
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Publication number: 20210366758Abstract: Various embodiments of microelectronic devices and methods of manufacturing are described herein. In one embodiment, a method for enhancing wafer bonding includes positioning a substrate assembly on a unipolar electrostatic chuck in direct contact with an electrode, electrically coupling a conductor to a second substrate positioned on top of the first substrate, and applying a voltage to the electrode, thereby creating a potential differential between the first substrate and the second substrate that generates an electrostatic force between the first and second substrates.Type: ApplicationFiled: August 5, 2021Publication date: November 25, 2021Inventors: Shu Qin, Ming Zhang
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Patent number: 11114328Abstract: Various embodiments of microelectronic devices and methods of manufacturing are described herein. In one embodiment, a method for enhancing wafer bonding includes positioning a substrate assembly on a unipolar electrostatic chuck in direct contact with an electrode, electrically coupling a conductor to a second substrate positioned on top of the first substrate, and applying a voltage to the electrode, thereby creating a potential differential between the first substrate and the second substrate that generates an electrostatic force between the first and second substrates.Type: GrantFiled: November 30, 2018Date of Patent: September 7, 2021Assignee: Micron Technology, Inc.Inventors: Shu Qin, Ming Zhang
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Publication number: 20210202243Abstract: In a variety of processes for forming electronic devices that use spin-on dielectric materials, properties of the spin-on dielectric materials can be enhanced by curing these materials using plasma doping. For example, hardness and Young's modulus can be increased for the cured material. Other properties may be enhanced. The plasma doping to cure the spin-on dielectric materials uses a mechanism that is a combination of plasma ion implant and high energy radiation associated with the species ionized. In addition, physical properties of the spin-on dielectric materials can be modified along a length of the spin-on dielectric materials by selection of an implant energy and dopant dose for the particular dopant used, corresponding to a selection variation with respect to length.Type: ApplicationFiled: May 13, 2020Publication date: July 1, 2021Applicant: Micron Technology, Inc.Inventors: Santanu Sarkar, Jay Steven Brown, Shu Qin, Yongjun Jeff Hu, Farrell Martin Good
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Publication number: 20210082703Abstract: Some embodiments include an integrated assembly having a first semiconductor structure containing heavily-doped silicon, a germanium-containing interface material over the first semiconductor structure, and a second semiconductor structure over the germanium-containing interface material. The second semiconductor structure has a heavily-doped lower region adjacent the germanium-containing interface material and has a lightly-doped upper region above the heavily-doped lower region. The lightly-doped upper region and heavily-doped lower region are majority doped to a same dopant type, and join to one another along a boundary region. Some embodiments include an integrated assembly having germanium oxide between a first silicon-containing structure and a second silicon-containing structure. Some embodiments include methods of forming assemblies.Type: ApplicationFiled: November 17, 2020Publication date: March 18, 2021Applicant: Micron Technology, Inc.Inventors: Yushi Hu, Shu Qin
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Patent number: 10879071Abstract: Some embodiments include an integrated assembly having a first semiconductor structure containing heavily-doped silicon, a germanium-containing interface material over the first semiconductor structure, and a second semiconductor structure over the germanium-containing interface material. The second semiconductor structure has a heavily-doped lower region adjacent the germanium-containing interface material and has a lightly-doped upper region above the heavily-doped lower region. The lightly-doped upper region and heavily-doped lower region are majority doped to a same dopant type, and join to one another along a boundary region. Some embodiments include an integrated assembly having germanium oxide between a first silicon-containing structure and a second silicon-containing structure. Some embodiments include methods of forming assemblies.Type: GrantFiled: March 4, 2019Date of Patent: December 29, 2020Assignee: Micron Technology, Inc.Inventors: Yushi Hu, Shu Qin
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Patent number: 10720574Abstract: Memory devices and methods for fabricating memory devices have been disclosed. One such method includes forming the memory stack out of a plurality of elements. An adhesion species is formed on at least one sidewall of the memory stack wherein the adhesion species has a gradient structure that results in the adhesion species intermixing with an element of the memory stack to terminate unsatisfied atomic bonds of the element. The gradient structure further comprises a film of the adhesion species on an outer surface of the at least one sidewall. A dielectric material is implanted into the film of the adhesion species to form a sidewall liner.Type: GrantFiled: February 4, 2019Date of Patent: July 21, 2020Assignee: Micron Technology, Inc.Inventors: Tsz W. Chan, Yongjun Jeff Hu, Swapnil Lengade, Shu Qin, Everett Allen McTeer
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Patent number: 10546895Abstract: Memory devices and methods for fabricating memory devices have been disclosed. One such memory device includes a first electrode material formed on a word line material. A selector device material is formed on the first electrode material. A second electrode material is formed on the selector device material. A phase change material is formed on the second electrode material. A third electrode material is formed on the phase change material. An adhesion species is plasma doped into sidewalls of the memory stack and a liner material is formed on the sidewalls of the memory stack. The adhesion species intermixes with an element of the memory stack and the sidewall liner to terminate unsatisfied atomic bonds of the element and the sidewall liner.Type: GrantFiled: January 7, 2019Date of Patent: January 28, 2020Assignee: Micron Technology, Inc.Inventors: Yongjun Jeff Hu, Tsz W. Chan, Swapnil Lengade, Everett Allen McTeer, Shu Qin
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Publication number: 20190355902Abstract: Memory devices and methods for fabricating memory devices have been disclosed. One such method includes forming the memory stack out of a plurality of elements. An adhesion species is formed on at least one sidewall of the memory stack wherein the adhesion species has a gradient structure that results in the adhesion species intermixing with an element of the memory stack to terminate unsatisfied atomic bonds of the element. The gradient structure further comprises a film of the adhesion species on an outer surface of the at least one sidewall. A dielectric material is implanted into the film of the adhesion species to form a sidewall liner.Type: ApplicationFiled: February 4, 2019Publication date: November 21, 2019Inventors: Tsz W. Chan, Yongjun Jeff Hu, Swapnil Lengade, Shu Qin, Everett Allen McTeer
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Publication number: 20190198324Abstract: Some embodiments include an integrated assembly having a first semiconductor structure containing heavily-doped silicon, a germanium-containing interface material over the first semiconductor structure, and a second semiconductor structure over the germanium-containing interface material. The second semiconductor structure has a heavily-doped lower region adjacent the germanium-containing interface material and has a lightly-doped upper region above the heavily-doped lower region. The lightly-doped upper region and heavily-doped lower region are majority doped to a same dopant type, and join to one another along a boundary region. Some embodiments include an integrated assembly having germanium oxide between a first silicon-containing structure and a second silicon-containing structure. Some embodiments include methods of forming assemblies.Type: ApplicationFiled: March 4, 2019Publication date: June 27, 2019Applicant: Micron Technology, Inc.Inventors: Yushi Hu, Shu Qin
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Publication number: 20190140023Abstract: Memory devices and methods for fabricating memory devices have been disclosed. One such memory device includes a first electrode material formed on a word line material. A selector device material is formed on the first electrode material. A second electrode material is formed on the selector device material. A phase change material is formed on the second electrode material. A third electrode material is formed on the phase change material. An adhesion species is plasma doped into sidewalls of the memory stack and a liner material is formed on the sidewalls of the memory stack. The adhesion species intermixes with an element of the memory stack and the sidewall liner to terminate unsatisfied atomic bonds of the element and the sidewall liner.Type: ApplicationFiled: January 7, 2019Publication date: May 9, 2019Inventors: Yongjun Jeff Hu, Tsz W. Chan, Swapnil Lengade, Everett Allen McTeer, Shu Qin
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Patent number: 10256098Abstract: Some embodiments include an integrated assembly having a first semiconductor structure containing heavily-doped silicon, a germanium-containing interface material over the first semiconductor structure, and a second semiconductor structure over the germanium-containing interface material. The second semiconductor structure has a heavily-doped lower region adjacent the germanium-containing interface material and has a lightly-doped upper region above the heavily-doped lower region. The lightly-doped upper region and heavily-doped lower region are majority doped to a same dopant type, and join to one another along a boundary region. Some embodiments include an integrated assembly having germanium oxide between a first silicon-containing structure and a second silicon-containing structure. Some embodiments include methods of forming assemblies.Type: GrantFiled: October 29, 2015Date of Patent: April 9, 2019Assignee: Micron Technology, Inc.Inventors: Yushi Hu, Shu Qin
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Publication number: 20190096732Abstract: Various embodiments of microelectronic devices and methods of manufacturing are described herein. In one embodiment, a method for enhancing wafer bonding includes positioning a substrate assembly on a unipolar electrostatic chuck in direct contact with an electrode, electrically coupling a conductor to a second substrate positioned on top of the first substrate, and applying a voltage to the electrode, thereby creating a potential differential between the first substrate and the second substrate that generates an electrostatic force between the first and second substrates.Type: ApplicationFiled: November 30, 2018Publication date: March 28, 2019Inventors: Shu Qin, Ming Zhang
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Publication number: 20190088867Abstract: Memory devices and methods for fabricating memory devices have been disclosed. One such method includes forming the memory stack out of a plurality of elements. An adhesion species is formed on at least one sidewall of the memory stack wherein the adhesion species has a gradient structure that results in the adhesion species intermixing with an element of the memory stack to terminate unsatisfied atomic bonds of the element. The gradient structure further comprises a film of the adhesion species on an outer surface of the at least one sidewall.Type: ApplicationFiled: January 29, 2018Publication date: March 21, 2019Inventors: Tsz W. Chan, Yongjun Jeff Hu, Swapnil Lengade, Shu Qin, Everett Allen McTeer
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Patent number: 10224479Abstract: Memory devices and methods for fabricating memory devices have been disclosed. One such method includes forming the memory stack out of a plurality of elements. An adhesion species is formed on at least one sidewall of the memory stack wherein the adhesion species has a gradient structure that results in the adhesion species intermixing with an element of the memory stack to terminate unsatisfied atomic bonds of the element. The gradient structure further comprises a film of the adhesion species on an outer surface of the at least one sidewall. A dielectric material is implanted into the film of the adhesion species to form a sidewall liner.Type: GrantFiled: January 29, 2018Date of Patent: March 5, 2019Assignee: Micron Technology, Inc.Inventors: Tsz W. Chan, Yongjun Jeff Hu, Swapnil Lengade, Shu Qin, Everett Allen McTeer
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Patent number: 10177198Abstract: Memory devices and methods for fabricating memory devices have been disclosed. One such memory device includes a first electrode material formed on a word line material. A selector device material is formed on the first electrode material. A second electrode material is formed on the selector device material. A phase change material is formed on the second electrode material. A third electrode material is formed on the phase change material. An adhesion species is plasma doped into sidewalls of the memory stack and a liner material is formed on the sidewalls of the memory stack. The adhesion species intermixes with an element of the memory stack and the sidewall liner to terminate unsatisfied atomic bonds of the element and the sidewall liner.Type: GrantFiled: June 5, 2017Date of Patent: January 8, 2019Assignee: Micron Technology, Inc.Inventors: Yongjun Jeff Hu, Tsz W. Chan, Swapnil Lengade, Everett Allen McTeer, Shu Qin