Patents by Inventor Shu-Rong Chun
Shu-Rong Chun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210305212Abstract: A manufacturing method of a semiconductor package includes the following steps. At least one lower semiconductor device is provided. A plurality of conductive pillars are formed on the at least one lower semiconductor device. A dummy die is disposed on a side of the at least one lower semiconductor device. An upper semiconductor device is disposed on the at least one lower semiconductor device and the dummy die, wherein the upper semiconductor device reveals a portion of the at least one lower semiconductor device where the plurality of conductive pillars are disposed. The at least one lower semiconductor device, the dummy die, the upper semiconductor device, and the plurality of conductive pillars are encapsulated in an encapsulating material. A redistribution structure is formed over the upper semiconductor device and the plurality of conductive pillars.Type: ApplicationFiled: May 10, 2021Publication date: September 30, 2021Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-Kang Hsieh, Hung-Yi Kuo, Hao-Yi Tsai, Kuo-Lung Pan, Ting Hao Kuo, Yu-Chia Lai, Mao-Yen Chang, Po-Yuan Teng, Shu-Rong Chun
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Patent number: 11121070Abstract: A device includes a package. The package includes a plurality of dies, an encapsulant encapsulating the plurality of dies, and a redistribution structure over the plurality of dies and the encapsulant. The device further includes first sockets bonded to a top surface of the redistribution structure and a rigid/flexible substrate bonded to the top surface of the redistribution structure. The rigid/flexible substrate includes a first rigid portion, a second rigid portion, and a flexible portion interposed between the first rigid portion and the second rigid portion. The device further includes second sockets bonded to the first rigid portion of the rigid/flexible substrate and connector modules bonded to the second rigid portion of the rigid/flexible substrate.Type: GrantFiled: November 1, 2019Date of Patent: September 14, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shu-Rong Chun, Tin-Hao Kuo, Chi-Hui Lai, Kuo Lung Pan, Hao-Yi Tsai, Chung-Shi Liu, Chen-Hua Yu
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Patent number: 11107771Abstract: A method includes encapsulating a plurality of package components in an encapsulant, and forming a first plurality of redistribution layers over and electrically coupling to the plurality of package components. The first plurality of redistribution layers have a plurality of power/ground pad stacks, with each of the plurality of power/ground pad stacks having a pad in each of the first plurality of redistribution layers. The plurality of power/ground pad stacks include a plurality of power pad stacks, and a plurality of ground pad stacks. At least one second redistribution layer is formed over the first plurality of redistribution layers. The second redistribution layer(s) include power lines and electrical grounding lines electrically connecting to the plurality of power/ground pad stacks.Type: GrantFiled: December 26, 2019Date of Patent: August 31, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shu-Rong Chun, Tin-Hao Kuo, Chi-Hui Lai, Kuo Lung Pan, Yu-Chia Lai, Hao-Yi Tsai, Chung-Shi Liu, Chen-Hua Yu
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Publication number: 20210265228Abstract: In an embodiment, a device includes: a package component including: integrated circuit dies; an encapsulant around the integrated circuit dies; a redistribution structure over the encapsulant and the integrated circuit dies, the redistribution structure being electrically coupled to the integrated circuit dies; sockets over the redistribution structure, the sockets being electrically coupled to the redistribution structure; and a support ring over the redistribution structure and surrounding the sockets, the support ring being disposed along outermost edges of the redistribution structure, the support ring at least partially laterally overlapping the redistribution structure.Type: ApplicationFiled: May 10, 2021Publication date: August 26, 2021Inventors: Shu-Rong Chun, Kuo Lung Pan, Tin-Hao Kuo, Hao-Yi Tsai, Pei-Hsuan Lee, Chien Ling Hwang, Yu-Chia Lai, Po-Yuan Teng, Chen-Hua Yu
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Publication number: 20210233835Abstract: In an embodiment, a device includes: a package component including: a first integrated circuit die; an encapsulant at least partially surrounding the first integrated circuit die; a redistribution structure on the encapsulant, the redistribution structure physically and electrically coupling the first integrated circuit die; a first module socket attached to the redistribution structure; an interposer attached to the redistribution structure adjacent the first module socket, the outermost extent of the interposer extending beyond the outermost extent of the redistribution structure; and an external connector attached to the interposer.Type: ApplicationFiled: April 12, 2021Publication date: July 29, 2021Inventors: Chi-Hui Lai, Shu-Rong Chun, Kuo Lung Pan, Tin-Hao Kuo, Hao-Yi Tsai, Chung-Shi Liu, Chen-Hua Yu
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Publication number: 20210202391Abstract: A method includes encapsulating a plurality of package components in an encapsulant, and forming a first plurality of redistribution layers over and electrically coupling to the plurality of package components. The first plurality of redistribution layers have a plurality of power/ground pad stacks, with each of the plurality of power/ground pad stacks having a pad in each of the first plurality of redistribution layers. The plurality of power/ground pad stacks include a plurality of power pad stacks, and a plurality of ground pad stacks. At least one second redistribution layer is formed over the first plurality of redistribution layers. The second redistribution layer(s) include power lines and electrical grounding lines electrically connecting to the plurality of power/ground pad stacks.Type: ApplicationFiled: December 26, 2019Publication date: July 1, 2021Inventors: Shu-Rong Chun, Tin-Hao Kuo, Chi-Hui Lai, Kuo Lung Pan, Yu-Chia Lai, Hao-Yi Tsai, Chung-Shi Liu, Chen-Hua Yu
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Patent number: 11049805Abstract: In an embodiment, a device includes: a first redistribution structure including a first dielectric layer; a die adhered to a first side of the first redistribution structure; an encapsulant laterally encapsulating the die, the encapsulant being bonded to the first dielectric layer with first covalent bonds; a through via extending through the encapsulant; and first conductive connectors electrically connected to a second side of the first redistribution structure, a subset of the first conductive connectors overlapping an interface of the encapsulant and the die.Type: GrantFiled: February 4, 2019Date of Patent: June 29, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kuo Lung Pan, Shu-Rong Chun, Teng-Yuan Lo, Hung-Yi Kuo, Chih-Horng Chang, Tin-Hao Kuo, Hao-Yi Tsai
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Patent number: 11004827Abstract: A manufacturing method of a semiconductor package includes the following steps. At least one lower semiconductor device is provided. A plurality of conductive pillars are formed on the at least one lower semiconductor device. A dummy die is disposed on a side of the at least one lower semiconductor device. An upper semiconductor device is disposed on the at least one lower semiconductor device and the dummy die, wherein the upper semiconductor device reveals a portion of the at least one lower semiconductor device where the plurality of conductive pillars are disposed. The at least one lower semiconductor device, the dummy die, the upper semiconductor device, and the plurality of conductive pillars are encapsulated in an encapsulating material. A redistribution structure is formed over the upper semiconductor device and the plurality of conductive pillars.Type: GrantFiled: September 18, 2018Date of Patent: May 11, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei Kang Hsieh, Hung-Yi Kuo, Hao-Yi Tsai, Kuo Lung Pan, Tin-Hao Kuo, Yu-Chia Lai, Mao-Yen Chang, Po-Yuan Teng, Shu-Rong Chun
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Patent number: 11004758Abstract: In an embodiment, a device includes: a package component including: integrated circuit dies; an encapsulant around the integrated circuit dies; a redistribution structure over the encapsulant and the integrated circuit dies, the redistribution structure being electrically coupled to the integrated circuit dies; sockets over the redistribution structure, the sockets being electrically coupled to the redistribution structure; and a support ring over the redistribution structure and surrounding the sockets, the support ring being disposed along outermost edges of the redistribution structure, the support ring at least partially laterally overlapping the redistribution structure.Type: GrantFiled: June 17, 2019Date of Patent: May 11, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shu-Rong Chun, Kuo Lung Pan, Tin-Hao Kuo, Hao-Yi Tsai, Pei-Hsuan Lee, Chien Ling Hwang, Yu-Chia Lai, Po-Yuan Teng, Chen-Hua Yu
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Patent number: 10978382Abstract: In an embodiment, a device includes: a package component including: a first integrated circuit die; an encapsulant at least partially surrounding the first integrated circuit die; a redistribution structure on the encapsulant, the redistribution structure physically and electrically coupling the first integrated circuit die; a first module socket attached to the redistribution structure; an interposer attached to the redistribution structure adjacent the first module socket, the outermost extent of the interposer extending beyond the outermost extent of the redistribution structure; and an external connector attached to the interposer.Type: GrantFiled: August 1, 2019Date of Patent: April 13, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chi-Hui Lai, Shu-Rong Chun, Kuo Lung Pan, Tin-Hao Kuo, Hao-Yi Tsai, Chung-Shi Liu, Chen-Hua Yu
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Publication number: 20210066242Abstract: A package includes a package substrate, an interposer over and bonded to the package substrate, a first wafer over and bonding to the interposer, and a second wafer over and bonding to the first wafer. The first wafer has independent passive device dies therein. The second wafer has active device dies therein.Type: ApplicationFiled: March 2, 2020Publication date: March 4, 2021Inventors: Chen-Hua Yu, Kuo Lung Pan, Shu-Rong Chun, Chi-Hui Lai, Tin-Hao Kuo, Hao-Yi Tsai, Chung-Shi Liu
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Publication number: 20200395257Abstract: In an embodiment, a device includes: a package component including: integrated circuit dies; an encapsulant around the integrated circuit dies; a redistribution structure over the encapsulant and the integrated circuit dies, the redistribution structure being electrically coupled to the integrated circuit dies; sockets over the redistribution structure, the sockets being electrically coupled to the redistribution structure; and a support ring over the redistribution structure and surrounding the sockets, the support ring being disposed along outermost edges of the redistribution structure, the support ring at least partially laterally overlapping the redistribution structure.Type: ApplicationFiled: June 17, 2019Publication date: December 17, 2020Inventors: Shu-Rong Chun, Kuo Lung Pan, Tin-Hao Kuo, Hao-Yi Tsai, Pei-Hsuan Lee, Chien Ling Hwang, Yu-Chia Lai, Po-Yuan Teng, Chen-Hua Yu
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Publication number: 20200251407Abstract: A device includes a package. The package includes a plurality of dies, an encapsulant encapsulating the plurality of dies, and a redistribution structure over the plurality of dies and the encapsulant. The device further includes first sockets bonded to a top surface of the redistribution structure and a rigid/flexible substrate bonded to the top surface of the redistribution structure. The rigid/flexible substrate includes a first rigid portion, a second rigid portion, and a flexible portion interposed between the first rigid portion and the second rigid portion. The device further includes second sockets bonded to the first rigid portion of the rigid/flexible substrate and connector modules bonded to the second rigid portion of the rigid/flexible substrate.Type: ApplicationFiled: November 1, 2019Publication date: August 6, 2020Inventors: Shu-Rong Chun, Tin-Hao Kuo, Chi-Hui Lai, Kuo Lung Pan, Hao-Yi Tsai, Chung-Shi Liu, Chen-Hua Yu
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Publication number: 20200243429Abstract: In an embodiment, a device includes: a package component including: a first integrated circuit die; an encapsulant at least partially surrounding the first integrated circuit die; a redistribution structure on the encapsulant, the redistribution structure physically and electrically coupling the first integrated circuit die; a first module socket attached to the redistribution structure; an interposer attached to the redistribution structure adjacent the first module socket, the outermost extent of the interposer extending beyond the outermost extent of the redistribution structure; and an external connector attached to the interposer.Type: ApplicationFiled: August 1, 2019Publication date: July 30, 2020Inventors: Chi-Hui Lai, Shu-Rong Chun, Kuo Lung Pan, Tin-Hao Kuo, Hao-Yi Tsai, Chung-Shi Liu, Chen-Hua Yu
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Publication number: 20200211922Abstract: In an embodiment, a device includes: a package component including integrated circuit dies, an encapsulant around the integrated circuit dies, a redistribution structure over the encapsulant and the integrated circuit dies, and sockets over the redistribution structure; a mechanical brace physically coupled to the sockets, the mechanical brace having openings, each one of the openings exposing a respective one of the sockets; a thermal module physically and thermally coupled to the encapsulant and the integrated circuit dies; and bolts extending through the thermal module, the mechanical brace, and the package component.Type: ApplicationFiled: August 1, 2019Publication date: July 2, 2020Inventors: Shu-Rong Chun, Kuo Lung Pan, Pei-Hsuan Lee, Chien Ling Hwang, Yu-Chia Lai, Tin-Hao Kuo, Hao-Yi Tsai, Chen-Hua Yu
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Publication number: 20200212018Abstract: A packaged semiconductor device including an integrated passive device-containing package component disposed between a power module and an integrated circuit-containing package and a method of forming the same are disclosed. In an embodiment, a device includes a first package component including a first integrated circuit die; a first encapsulant at least partially surrounding the first integrated circuit die; and a redistribution structure on the first encapsulant and coupled to the first integrated circuit die; a second package component bonded to the first package component, the second package component including an integrated passive device; and a second encapsulant at least partially surrounding the integrated passive device; and a power module attached to the first package component through the second package component.Type: ApplicationFiled: October 1, 2019Publication date: July 2, 2020Inventors: Chi-Hui Lai, Shu-Rong Chun, Kuo Lung Pan, Tin-Hao Kuo, Hao-Yi Tsai, Chung-Shi Liu, Chen-Hua Yu
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Publication number: 20200091114Abstract: A manufacturing method of a semiconductor package includes the following steps. At least one lower semiconductor device is provided. A plurality of conductive pillars are formed on the at least one lower semiconductor device. A dummy die is disposed on a side of the at least one lower semiconductor device. An upper semiconductor device is disposed on the at least one lower semiconductor device and the dummy die, wherein the upper semiconductor device reveals a portion of the at least one lower semiconductor device where the plurality of conductive pillars are disposed. The at least one lower semiconductor device, the dummy die, the upper semiconductor device, and the plurality of conductive pillars are encapsulated in an encapsulating material. A redistribution structure is formed over the upper semiconductor device and the plurality of conductive pillars.Type: ApplicationFiled: September 18, 2018Publication date: March 19, 2020Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Wei Kang Hsieh, Hung-Yi Kuo, Hao-Yi Tsai, Kuo Lung Pan, Tin-Hao Kuo, Yu-Chia Lai, Mao-Yen Chang, Po-Yuan Teng, Shu-Rong Chun
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Publication number: 20200006220Abstract: In an embodiment, a device includes: a first redistribution structure including a first dielectric layer; a die adhered to a first side of the first redistribution structure; an encapsulant laterally encapsulating the die, the encapsulant being bonded to the first dielectric layer with first covalent bonds; a through via extending through the encapsulant; and first conductive connectors electrically connected to a second side of the first redistribution structure, a subset of the first conductive connectors overlapping an interface of the encapsulant and the die.Type: ApplicationFiled: February 4, 2019Publication date: January 2, 2020Inventors: Kuo Lung Pan, Shu-Rong Chun, Teng-Yuan Lo, Hung-Yi Kuo, Chih-Horng Chang, Tin-Hao Kuo, Hao-Yi Tsai