Abstract: A method includes forming a seed layer on a semiconductor wafer, coating a photo resist on the seed layer, performing a photo lithography process to expose the photo resist, and developing the photo resist to form an opening in the photo resist. The seed layer is exposed, and the opening includes a first opening of a metal pad and a second opening of a metal line connected to the first opening. At a joining point of the first opening and the second opening, a third opening of a metal patch is formed, so that all angles of the opening and adjacent to the first opening are greater than 90 degrees. The method further includes plating the metal pad, the metal line, and the metal patch in the opening in the photo resist, removing the photo resist, and etching the seed layer to leave the metal pad, the metal line and the metal patch.

Abstract: The present disclosure describes a method for the fabrication of ruthenium conductive structures over cobalt conductive structures. In some embodiments, the method includes forming a first opening in a dielectric layer to expose a first cobalt contact and filling the first opening with ruthenium metal to form a ruthenium contact on the first cobalt contact. The method also includes forming a second opening in the dielectric layer to expose a second cobalt contact and a gate structure and filling the second opening with tungsten to form a tungsten contact on the second cobalt contact and the gate structure. Further, the method includes forming a copper conductive structure on the ruthenium contact and the tungsten contact, where the copper from the copper conductive structure is in contact with the ruthenium metal from the ruthenium contact.

Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a substrate having a first cell region and a second cell region and a diffusion region on the substrate extending through the first cell region and the second cell region. Preferably, the diffusion region includes a first H-shape and a second H-shape according to a top view.

Abstract: An image processing device is provided. The device includes an electronic image stabilization (EIS) module and an image signal processing (ISP) module. The EIS module is configured to determine EIS information for a video frame based on motion information that corresponds to the video frame, wherein the EIS information is associated with the target region and the margin region of the video frame. The ISP module is configured to generate a processed video frame based on the EIS information by performing an ISP process only on the target region of the video frame and skipping the ISP process on the margin region of the video frame. The EIS module is further configured to generate a stabilized image based on the EIS information and the processed video frame.

Abstract: A semiconductor structure includes a substrate, a nanowire disposed over the substrate, a metal gate electrode layer and a gate dielectric layer. A dielectric layer is formed on the substrate. The nanowire has a first portion and a second portion. The nanowire has a first portion and a second portion, the first portion of the nanowire comprises a first semiconductor layer and a second semiconductor layer surrounded by the first semiconductor layer, the second portion comprises the second semiconductor layer. The metal gate electrode layer surrounds the first portion of the nanowire. The gate dielectric layer is disposed between the metal gate electrode layer and the nanowire.

Abstract: A method includes forming a seed layer on a semiconductor wafer, coating a photo resist on the seed layer, performing a photo lithography process to expose the photo resist, and developing the photo resist to form an opening in the photo resist. The seed layer is exposed, and the opening includes a first opening of a metal pad and a second opening of a metal line connected to the first opening. At a joining point of the first opening and the second opening, a third opening of a metal patch is formed, so that all angles of the opening and adjacent to the first opening are greater than 90 degrees. The method further includes plating the metal pad, the metal line, and the metal patch in the opening in the photo resist, removing the photo resist, and etching the seed layer to leave the metal pad, the metal line and the metal patch.

Abstract: A method of forming a gas spacer in a semiconductor device and a semiconductor device including the same are disclosed. In accordance with an embodiment, a method includes forming a gate stack over a substrate; forming a first gate spacer on sidewalls of the gate stack; forming a second gate spacer on sidewalls of the first gate spacer; removing the second gate spacer using an etching process to form a first opening, the etching process being performed at a temperature less than 0° C., the etching process using an etching solution including hydrogen fluoride; and depositing a dielectric layer over the first gate spacer and the gate stack, the dielectric layer sealing a gas spacer in the first opening.

Abstract: The present disclosure describes a method for the fabrication of ruthenium conductive structures over cobalt conductive structures. In some embodiments, the method includes forming a first opening in a dielectric layer to expose a first cobalt contact and filling the first opening with ruthenium metal to form a ruthenium contact on the first cobalt contact. The method also includes forming a second opening in the dielectric layer to expose a second cobalt contact and a gate structure and filling the second opening with tungsten to form a tungsten contact on the second cobalt contact and the gate structure. Further, the method includes forming a copper conductive structure on the ruthenium contact and the tungsten contact, where the copper from the copper conductive structure is in contact with the ruthenium metal from the ruthenium contact.

Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a substrate having a first cell region and a second cell region and a diffusion region on the substrate extending through the first cell region and the second cell region. Preferably, the diffusion region includes a first H-shape and a second H-shape according to a top view.

Abstract: A method for modifying glycoproteins is provided. The present disclosure also provides a method for producing glycoprotein-payload conjugates, the conjugates produced thereby, and the use thereof.

Abstract: A molding method of a support rod that first passing a plurality of long fibers through a resin bath for impregnating with resin, then passing the plurality of long fibers impregnated with resin through a bundling hole of a position-constrained vertical plate on a machine to preliminarily form a bundle end; providing a coating layer on the machine, one end of the coating layer obliquely passes through a guiding portion on the position-constrained vertical plate to downwardly contact the bundle end; then placing the one end of the coating layer and the bundle end into a mold cavity of a mold at the same time to form a long rod body; and then cutting the long rod body into multi-segment support rods through a cutting process.

Abstract: A shared memory based network having a transferring network switch and a receiving network switch. In this network, each network switch has a stack, queues corresponding to output ports and a dared control port. The stack stores available buffer addresses of the shared memory. Each of the queues stores to-be-accessed buffer addresses of the corresponding output port. The shared control port is driven to indicate states of the shared memory based network, so that th stack of the transferring network switch is identical with the stack of the receiving network switch. The shared memory can be read by all output ports of both the transferring network switch and the receiving network switch according to their corresponding queues.

Abstract: Improved method and apparatus for vector quantization (VQ) to build a codebook for the compression of data. The codebook or "tree" is initialized by establishing N initial nodes and creating the remainder of the codebook as a binary codebook. Children entries are split upon determination of various attributes, such as maximum distortion, population, etc. Vectors obtained from the data are associated with the children nodes, and then representative children entries are recalculated. This splitting/reassociation continues iteratively until a difference in error associated with the previous children and current children becomes less than a threshold. This splitting and reassociating process continues until the maximum number of terminal nodes is created in the tree, a total error or distortion threshold has been reached or some other criterion. The data may then be transmitted as a compressed bitstream comprising a codebook and indices referencing the codebook.

Abstract: A signal processing system determines the characteristic of a signal for encoding or decoding by examining and classifying such signal, and then applies a transformation or inverse transformation to such signal. Depending on classification of the signal, various transforms or inverse transforms are applicable adaptively thereto.

Abstract: Improved method and apparatus for vector quantization (VQ) to build a codebook for the compression of data. The codebook or "tree" is initialized by establishing N initial nodes and creating the remainder of the codebook as a binary codebook. Children entries are split upon determination of various attributes, such as maximum distortion, population, etc. Vectors obtained from the data are associated with the children nodes, and then representative children entries are recalculated. This splitting/reassociation continues iteratively until a difference in error associated with the previous children and current children becomes less than a threshold. This splitting and reassociating process continues until the maximum number of terminal nodes is created in the tree, a total error or distortion threshold has been reached or some other criterion. The data may then be transmitted as a compressed bitstream comprising a codebook and indices referencing the codebook.

Abstract: Decoding and encoding of variable length data words and data strings is accelerated by testing for and processing more than one word or string per encoding or decoding cycle. In an encoding scheme wherein fixed length data words are encoded into variable length data strings, decoding is carried out by first receiving a data stream having a plurality of encoded data strings contained therein, and then testing at least a portion of the data stream to determine whether the portion contains one of a number of selected sets of multiple data strings. If the portion of the data stream contains one of the selected sets of multiple data strings, the multiple data strings are decoded into a corresponding set of multiple data words. This decoding procedure allows a plurality of encoded data strings to be decoded in a single decoding cycle. The procedure may be implemented using either a single lookup table or a set of split-level lookup tables.

Abstract: A display memory architecture which efficiently stores and processes true color and index mode pixels is disclosed. The R, G and B components of true color mode pixels occupy different groups of bit planes in different banks of a frame memory. In addition, consecutive index mode pixels are located in not necessarily consecutive different groups of bit planes in consecutive banks so that a plurality of index mode pixels can be accessed simultaneously in reading and writing operations. Pixel swap circuits are used to swap the order of the R, G and B components of true color pixels and the order of simultaneously accessed index mode pixels, when the order of the accessed locations is different from the order in which R, G and B components of true color pixels or a plurality of index mode pixels are processed by a graphics processor.

Abstract: A host computer, a graphics processor which receives and executes commands generated by the host computer, a display memory for storing display data, and a display device for displaying the display data are provided. A graphics context is also provided in which the parameters of a current image are stored. A processing unit for receiving and executing the graphics commands issued by the host computer and for converting the parameters stored in the graphics context into the display data, and a drawing unit for storing the display data in the display memory are also provided. Furthermore, a shared memory is provided which is directly accessible to the host computer so that it can write the parameters of a next graphics command into the shared memory while the graphics processor is executing a current command. The shared memory is also directly accessible to the graphics processor so that it can receive the parameters of the next graphics command to be executed directly from the shared memory.