Abstract: In a method of manufacturing a semiconductor device, a fin structure including a stacked layer of first and second semiconductor layers and a hard mask layer over the stacked layer is formed. A sacrificial cladding layer is formed over at least sidewalls of the exposed hard mask layer and stacked layer. An etching is performed to remove lateral portions of the sacrificial cladding layer, thereby leaving the sacrificial cladding layer on sidewalls of the exposed hard mask layer and stacked layer. A first dielectric layer and a second dielectric layer made of a different material than the first dielectric layer are formed. The second dielectric layer is recessed, and a third dielectric layer made of a different material than the second dielectric layer is formed on the recessed second dielectric layer. During the etching operation, a protection layer is formed over the sacrificial cladding layer.

Abstract: The present disclosure provides a method of making a semiconductor device. The method includes forming a semiconductor stack on a substrate, wherein the semiconductor stack includes first semiconductor layers of a first semiconductor material and second semiconductor layers of a second semiconductor material alternatively stacked on the substrate; patterning the semiconductor stack and the substrate to form a trench and an active region being adjacent the trench; epitaxially growing a liner of the first semiconductor material on sidewalls of the trench and sidewalls of the active region; forming an isolation feature in the trench; performing a rapid thermal nitridation process, thereby converting the liner into a silicon nitride layer; and forming a cladding layer of the second semiconductor material over the silicon nitride layer.

Abstract: In a method of manufacturing a semiconductor device, a fin structure including a stacked layer of first and second semiconductor layers and a hard mask layer over the stacked layer is formed. A sacrificial cladding layer is formed over at least sidewalls of the exposed hard mask layer and stacked layer. An etching is performed to remove lateral portions of the sacrificial cladding layer, thereby leaving the sacrificial cladding layer on sidewalls of the exposed hard mask layer and stacked layer. A first dielectric layer and a second dielectric layer made of a different material than the first dielectric layer are formed. The second dielectric layer is recessed, and a third dielectric layer made of a different material than the second dielectric layer is formed on the recessed second dielectric layer. During the etching operation, a protection layer is formed over the sacrificial cladding layer.

Abstract: A plurality of first semiconductor layers and second semiconductor layers are formed over a front side of a substrate. The first semiconductor layers interleave with the second semiconductor layers in a vertical direction. The first semiconductor layers and second semiconductor layers are etched into a plurality of stacks. The etching is performed such that a bottommost first semiconductor layer is etched to have a tapered profile in a cross-sectional view. The bottommost first semiconductor layer is replaced with a dielectric layer. The dielectric layer inherits the tapered profile of the bottommost first semiconductor layer. Gate structures are formed over the stacks. The gate structures each extend in a first horizontal direction. A first interconnect structure is formed over the gate structures. A second interconnect structure is formed over a back side of the substrate.

Abstract: A semiconductor device structure is provided. The device includes a plurality of semiconductor layers vertically stacked, and a gate electrode layer comprising an upper portion disposed between two adjacent gate spacers, the upper portion having a first diameter. The gate electrode layer also includes a lower portion disposed below the upper portion including a first part surrounding each semiconductor layer of the plurality of semiconductor layers and a second part adjacent the first part, the second part comprising a first section having a second diameter that is less than the first diameter, a second section below the first section, the second section having a third diameter different than the second diameter, and a third section below the second section, wherein the third section has a fourth diameter different than the second diameter and the third diameter, wherein the first and second parts are formed as an integral.

Abstract: In a method of manufacturing a semiconductor device, a fin structure including a stacked layer of first and second semiconductor layers and a hard mask layer over the stacked layer is formed. A sacrificial cladding layer is formed over at least sidewalls of the exposed hard mask layer and stacked layer. An etching is performed to remove lateral portions of the sacrificial cladding layer, thereby leaving the sacrificial cladding layer on sidewalls of the exposed hard mask layer and stacked layer. A first dielectric layer and a second dielectric layer made of a different material than the first dielectric layer are formed. The second dielectric layer is recessed, and a third dielectric layer made of a different material than the second dielectric layer is formed on the recessed second dielectric layer. During the etching operation, a protection layer is formed over the sacrificial cladding layer.

Abstract: A semiconductor device structure is provided. The device includes a plurality of semiconductor layers and a gate electrode layer surrounding each semiconductor layer of the plurality of semiconductor layers. The gate electrode layer includes a first part, and a second part below the first part, the second part comprises a first portion, wherein an exterior surface of the first portion has a first radius of curvature, and a second portion below the first portion, and a third portion below the second portion, wherein an exterior surface of the third portion having a second radius of curvature different than the first radius of curvature.

Abstract: In a method of manufacturing a semiconductor device, a field effect transistor (FET) having a metal gate structure, a source and a drain over a substrate is formed. A first frontside contact disposed between dummy metal gate structures is formed over an isolation insulating layer. A frontside wiring layer is formed over the first frontside contact. A part of the substrate is removed from a backside of the substrate so that a bottom of the isolation insulating layer is exposed. A first opening is formed in the isolation insulating layer from the bottom of the isolation insulating layer to expose a bottom of the first frontside contact. A first backside contact is formed by filling the first opening with a conductive material to connect the first frontside contact.

Abstract: In a method of manufacturing a semiconductor device, a fin structure including a stacked layer of first and second semiconductor layers and a hard mask layer over the stacked layer is formed. A sacrificial cladding layer is formed over at least sidewalls of the exposed hard mask layer and stacked layer. An etching is performed to remove lateral portions of the sacrificial cladding layer, thereby leaving the sacrificial cladding layer on sidewalls of the exposed hard mask layer and stacked layer. A first dielectric layer and a second dielectric layer made of a different material than the first dielectric layer are formed. The second dielectric layer is recessed, and a third dielectric layer made of a different material than the second dielectric layer is formed on the recessed second dielectric layer. During the etching operation, a protection layer is formed over the sacrificial cladding layer.

Abstract: The present disclosure provides a method of making a semiconductor device. The method includes forming a semiconductor stack on a substrate, wherein the semiconductor stack includes first semiconductor layers of a first semiconductor material and second semiconductor layers of a second semiconductor material alternatively stacked on the substrate; patterning the semiconductor stack and the substrate to form a trench and an active region being adjacent the trench; epitaxially growing a liner of the first semiconductor material on sidewalls of the trench and sidewalls of the active region; forming an isolation feature in the trench; performing a rapid thermal nitridation process, thereby converting the liner into a silicon nitride layer; and forming a cladding layer of the second semiconductor material over the silicon nitride layer.

Abstract: A semiconductor device structure is provided. The device includes a plurality of semiconductor layers and a gate electrode layer surrounding each semiconductor layer of the plurality of semiconductor layers. The gate electrode layer includes a first part, and a second part below the first part, the second part comprises a first portion, wherein an exterior surface of the first portion has a first radius of curvature, and a second portion below the first portion, and a third portion below the second portion, wherein an exterior surface of the third portion having a second radius of curvature different than the first radius of curvature.

Abstract: In a method of manufacturing a semiconductor device, a fin structure including a stacked layer of first and second semiconductor layers and a hard mask layer over the stacked layer is formed. A sacrificial cladding layer is formed over at least sidewalls of the exposed hard mask layer and stacked layer. An etching is performed to remove lateral portions of the sacrificial cladding layer, thereby leaving the sacrificial cladding layer on sidewalls of the exposed hard mask layer and stacked layer. A first dielectric layer and a second dielectric layer made of a different material than the first dielectric layer are formed. The second dielectric layer is recessed, and a third dielectric layer made of a different material than the second dielectric layer is formed on the recessed second dielectric layer. During the etching operation, a protection layer is formed over the sacrificial cladding layer.

Abstract: A plurality of first semiconductor layers and second semiconductor layers are formed over a front side of a substrate. The first semiconductor layers interleave with the second semiconductor layers in a vertical direction. The first semiconductor layers and second semiconductor layers are etched into a plurality of stacks. The etching is performed such that a bottommost first semiconductor layer is etched to have a tapered profile in a cross-sectional view. The bottommost first semiconductor layer is replaced with a dielectric layer. The dielectric layer inherits the tapered profile of the bottommost first semiconductor layer. Gate structures are formed over the stacks. The gate structures each extend in a first horizontal direction. A first interconnect structure is formed over the gate structures. A second interconnect structure is formed over a back side of the substrate.

Abstract: A semiconductor device structure is provided. The device includes a plurality of semiconductor layers and a gate electrode layer surrounding each semiconductor layer of the plurality of semiconductor layers. The gate electrode layer comprises a first part and a second part below the first part. The second part comprises a first portion disposed adjacent a first semiconductor layer of the plurality of semiconductor layers, and an exterior surface of the first portion having a first radius of curvature, a second portion below the first portion and in contact with a second semiconductor layer of the plurality of semiconductor layers, and a third portion below the second portion and in contact with a third semiconductor layer of the plurality of semiconductor layers, and an exterior surface of the third portion having a second radius of curvature greater than the first radius of curvature.

Abstract: A semiconductor device structure is provided. The device includes a plurality of semiconductor layers and a gate electrode layer surrounding each semiconductor layer of the plurality of semiconductor layers. The gate electrode layer comprises a first part and a second part below the first part. The second part comprises a first portion disposed adjacent a first semiconductor layer of the plurality of semiconductor layers, and an exterior surface of the first portion having a first radius of curvature, a second portion below the first portion and in contact with a second semiconductor layer of the plurality of semiconductor layers, and a third portion below the second portion and in contact with a third semiconductor layer of the plurality of semiconductor layers, and an exterior surface of the third portion having a second radius of curvature greater than the first radius of curvature.

Abstract: In a method of manufacturing a semiconductor device, a fin structure including a stacked layer of first and second semiconductor layers and a hard mask layer over the stacked layer is formed. A sacrificial cladding layer is formed over at least sidewalls of the exposed hard mask layer and stacked layer. An etching is performed to remove lateral portions of the sacrificial cladding layer, thereby leaving the sacrificial cladding layer on sidewalls of the exposed hard mask layer and stacked layer. A first dielectric layer and a second dielectric layer made of a different material than the first dielectric layer are formed. The second dielectric layer is recessed, and a third dielectric layer made of a different material than the second dielectric layer is formed on the recessed second dielectric layer. During the etching operation, a protection layer is formed over the sacrificial cladding layer.

Abstract: Methods of rectifying a sidewall profile of a fin-shaped stack structure are provided. An example method includes forming, on a substrate, a first fin-shaped structure and a second fin-shaped structure each including a plurality of channel layers interleaved by a plurality of sacrificial layers; depositing a first silicon liner over the first fin-shaped structure and the second fin-shaped structure; depositing a dielectric layer over the substrate, the first fin-shaped structure and the second fin-shaped structure; etching back the dielectric layer to form an isolation feature between the first fin-shaped structure and the second fin-shaped structure and to remove the first silicon liner over the first fin-shaped structure and the second fin-shaped structure to expose sidewalls of the plurality of channel layers and the plurality of sacrificial layers, and epitaxially depositing a second silicon liner over the exposed sidewalls of the plurality of channel layers and the plurality of sacrificial layers.

Abstract: Methods of rectifying a sidewall profile of a fin-shaped stack structure are provided. An example method includes forming, on a substrate, a first fin-shaped structure and a second fin-shaped structure each including a plurality of channel layers interleaved by a plurality of sacrificial layers; depositing a first silicon liner over the first fin-shaped structure and the second fin-shaped structure; depositing a dielectric layer over the substrate, the first fin-shaped structure and the second fin-shaped structure; etching back the dielectric layer to form an isolation feature between the first fin-shaped structure and the second fin-shaped structure and to remove the first silicon liner over the first fin-shaped structure and the second fin-shaped structure to expose sidewalls of the plurality of channel layers and the plurality of sacrificial layers, and epitaxially depositing a second silicon liner over the exposed sidewalls of the plurality of channel layers and the plurality of sacrificial layers.