Patents by Inventor Shu-Ya Hsu

Shu-Ya Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11923210
    Abstract: In an embodiment, a method includes: immersing a wafer in a bath within a cleaning chamber; removing the wafer out of the bath through a solvent and into a gas within the cleaning chamber; determining a parameter value from the gas; and performing remediation within the cleaning chamber in response to determining that the parameter value is beyond a threshold value.
    Type: Grant
    Filed: August 21, 2019
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wei-Chun Hsu, Shu-Yen Wang, Chui-Ya Peng
  • Publication number: 20040147136
    Abstract: This invention relates to a method for making the gate dielectric layer, more particularly, to the method for making the interface between the gate dielectric layer and silicon substrate by using oxygen radicals and hydroxyl radicals. In the method, we send the wafers, which has passed through the cleaning process for the silicon substrate, to the chamber at first and then transmit the first reaction gas, which comprises the nitric monoxide and the oxygen or comprises the nitric monoxide and nitrogen, to the chamber to form a silicon nitride layer or a silicon oxynitride layer on the first surface of the silicon substrate to be a gate. Next, we transmit the second reaction gas, which comprises the oxygen and the hydrogen, to the chamber and make the second reaction gas to be dissociated into the oxygen radicals and the hydroxyl radicals.
    Type: Application
    Filed: January 29, 2003
    Publication date: July 29, 2004
    Applicant: Macronix International Co., Ltd.
    Inventors: Cheng-Shun Chen, Yun-Chi Yang, Shu-Ya Hsu, Wei-Wen Chen, June-Min Yao
  • Patent number: 6703322
    Abstract: Multiple oxide layers with different thicknesses are formed on a semiconductor substrate with a silicon surface, having a first and second region. A sacrificial oxide layer is formed on the silicon surface to cover both the first region and the second region, with a mask layer formed on the surface of the sacrificial oxide layer. By defining and patterning the mask layer, a first opening and a second opening, having predetermined surface areas, are formed in portions of the first and second regions of the mask layer to expose portions of the. The sacrificial oxide layer has a surface area equal to the first predetermined surface area, and portions of the sacrificial oxide layer having a surface area equal to the second predetermined surface area. A linear nitrogen doping process is then performed to simultaneously implant nitrogen ions with a first and second predetermined concentration into the first and second region, through the first opening and the second opening, respectively.
    Type: Grant
    Filed: August 5, 2002
    Date of Patent: March 9, 2004
    Assignee: Macronix International Co. Ltd.
    Inventors: June-Min Yao, Cheng-Shun Chen, Shu-Ya Hsu
  • Publication number: 20040023454
    Abstract: The present invention generally relates to provides a method for utilizing a re-oxidation step of a nitride layer to form a super thin nitride gate oxide layer. First, an oxide layer or a nitride oxide layer provided with a high nitrogen contain and a very thin thickness is growing on a semiconductor substrate, wherein the oxide layer can be provided with a large quantity nitrogen element by a nitrogen-penetrating treatment. Then, a second oxide layer is growing by a rapidly thermal step. Since in the second time to perform the oxidation of the substrate, the oxygen atom must penetrate the nitrogenized oxide layer to perform the oxidation with the substrate, so the present invention can decrease the oxidation rate and obtain a dense gate oxide layer with a good interface performance. The present invention can improve the disadvantage of too fast oxidation rate of the super thin gate oxide layer process and overcome the disadvantage of the difficult for obtaining a uniform and dense oxide layer.
    Type: Application
    Filed: August 5, 2002
    Publication date: February 5, 2004
    Inventors: June-Min Yao, Shu-Ya Hsu
  • Publication number: 20040023512
    Abstract: Multiple oxide layers with different thicknesses are formed on a semiconductor substrate with a silicon surface, having a first and second region. A sacrificial oxide layer is formed on the silicon surface to cover both the first region and the second region, with a mask layer formed on the surface of the sacrificial oxide layer. By defining and patterning the mask layer, a first opening and a second opening, having predetermined surface areas, are formed in portions of the first and second regions of the mask layer to expose portions of the. The sacrificial oxide layer has a surface area equal to the first predetermined surface area, and portions of the sacrificial oxide layer having a surface area equal to the second predetermined surface area. A linear nitrogen doping process is then performed to simultaneously implant nitrogen ions with a first and second predetermined concentration into the first and second region, through the first opening and the second opening, respectively.
    Type: Application
    Filed: August 5, 2002
    Publication date: February 5, 2004
    Inventors: June-Min Yao, Cheng-Shun Chen, Shu-Ya Hsu
  • Publication number: 20030194871
    Abstract: The present invention provides a method of stress and damage elimination during formation of a trench isolation device. The method provides a semiconductor substrate and then the semiconductor substrate is etched to form a trench structure. The trench structure is subjected to annealing, such as high temperature or rapid thermal annealing, whereby eliminates stress of the trench structure. It is also applied on forming a side-wall oxide layer at a side-wall of the trench structure and then subjecting the side-wall oxide layer to annealing whereby eliminates oxidation-induced stress of the trench structure.
    Type: Application
    Filed: April 15, 2002
    Publication date: October 16, 2003
    Applicant: Macronix International Co., Ltd.
    Inventor: Shu-Ya Hsu
  • Publication number: 20030194870
    Abstract: A method for forming a sidewall oxide layer of a shallow trench isolation with reduced stress and encroachment is disclosed. The method utilizes introductions of oxygen and hydroxyl to perform an in situ steam generated process to form a sidewall oxide layer in a shallow trench isolation. The sidewall oxide layer formed by the method of this invention has less stress and the processing time is also much shorter than the processing time of the conventional thermal oxidation processes.
    Type: Application
    Filed: April 15, 2002
    Publication date: October 16, 2003
    Applicant: Macronix International Co., Ltd.
    Inventor: Shu-Ya Hsu
  • Patent number: 6602792
    Abstract: The invention utilizes introductions of oxygen and hydroxyl to perform an in situ steam generated (ISSG) process to anneal and reoxidize a conventional sidewall oxide layer in a shallow trench isolation. The ISSG annealing process renders the conventional sidewall oxide layer much less stress. The electrical property of the active regions and the isolation quality between the active regions can be assured.
    Type: Grant
    Filed: August 2, 2001
    Date of Patent: August 5, 2003
    Assignee: Macronix International Co., Ltd.
    Inventor: Shu-Ya Hsu
  • Publication number: 20030027403
    Abstract: A method for forming a sacrificial oxide layer is disclosed. The invention utilizes an in situ steam generated process comprising the introductions of oxygen and hydroxyl to oxidize active regions of a substrate and form a sacrificial oxide layer. The ISSG process renders the sacrificial oxide layer much less stress and encroachment. Unlike the conventional sacrificial oxide layer, the sacrificial oxide layer formed by the method set forth will not damage the substrate. The electrical and mechanical properties of the active regions can be assured.
    Type: Application
    Filed: August 3, 2001
    Publication date: February 6, 2003
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventor: Shu-Ya Hsu
  • Publication number: 20030027402
    Abstract: The invention utilizes introductions of oxygen and hydroxyl to perform an in situ steam generated (ISSG) process to anneal and reoxidize a conventional sidewall oxide layer in a shallow trench isolation. The ISSG annealing process renders the conventional sidewall oxide layer much less stress. The electrical property of the active regions and the isolation quality between the active regions can be assured.
    Type: Application
    Filed: August 2, 2001
    Publication date: February 6, 2003
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventor: Shu-Ya Hsu
  • Publication number: 20030017678
    Abstract: The present invention provides a method of retarding oxidation rate of a side-wall of an isolation device. The method comprises providing a semiconductor substrate having at least a trench structure thereon. The trench structure is filled with an insulating material to form the isolation device and then the isolation device is subjected to dry oxidation whereby retards the oxidation rate of the side-wall of the isolation device. The stress and encroachment effects on the active regions nearby the isolation device can be reduced because of the retarded oxidation rate.
    Type: Application
    Filed: July 20, 2001
    Publication date: January 23, 2003
    Applicant: Macronix International Co., Ltd.
    Inventor: Shu-Ya Hsu
  • Patent number: 6503815
    Abstract: The invention utilizes introductions of oxygen and hydroxyl to perform an in situ steam generated process to reoxidize a conventional sidewall oxide layer and density the oxide in a shallow trench isolation. The ISSG process renders the conventional sidewall oxide layer much less stress and encroachment. The electrical property of the active regions and the isolation quality between the active regions can be assured. The ISSG process can densify the oxide in a shallow trench isolation to prevent the oxide from being lost in the following clean process.
    Type: Grant
    Filed: August 3, 2001
    Date of Patent: January 7, 2003
    Assignee: Macronix International Co., Ltd.
    Inventor: Shu-Ya Hsu