Patents by Inventor Shu-Yu Chang
Shu-Yu Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240116751Abstract: A chip package includes an application chip, a micro-electromechanical systems (MEMS) chip, a conductive element, a bonding wire, and a molding compound. The application chip has a conductive pad. The MEMS chip is located on the application chip, and includes a main body and a cap. The main body is located between the cap and the application chip. The main body has a conductive pad. The conductive element is located on the conductive pad of the main body of the MEMS chip. The bonding wire extends from the conductive element to the conductive pad of the application chip. The molding compound is located on the application chip and surrounds the MEMS chip. The conductive element and the bonding wire are located in the molding compound.Type: ApplicationFiled: October 3, 2023Publication date: April 11, 2024Inventors: Chia-Ming CHENG, Shu-Ming CHANG, Tsang Yu LIU
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Publication number: 20240067746Abstract: Disclosed herein are humanized antibodies, antigen-binding fragments thereof, and antibody conjugates, that are capable of specifically binding to certain biantennary Lewis antigens, which antigens are expressed in a variety of cancers. The presently disclosed antibodies are useful to target antigen-expressing cells for treatment or detection of disease, including various cancers. Also provided are polynucleotides, vectors, and host cells for producing the disclosed antibodies and antigen-binding fragments thereof. Pharmaceutical compositions, methods of treatment and detection, and uses of the antibodies, antigen-binding fragments, antibody conjugates, and compositions are also provided.Type: ApplicationFiled: February 28, 2023Publication date: February 29, 2024Inventors: Tong-Hsuan CHANG, Mei-Chun YANG, Liahng-Yirn LIU, Jerry TING, Shu-Yen CHANG, Yen-Ying CHEN, Yu-Yu LIN, Shu-Lun TANG
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Patent number: 10915688Abstract: Disclosed is an IC layout design method capable of improving a result of an integrated circuit (IC) layout design process including a front-end process and a back-end process. The IC layout design method includes the following steps: executing the front-end process according to an initial clock latency setting and thereby generating an initial netlist; executing at least a part of the back-end process according to the initial netlist and thereby obtaining an updated clock latency setting; executing at least a part of the front-end process according to the updated clock latency setting and thereby generating an updated netlist; and executing the back-end process according to the updated netlist and thereby obtaining the result of the IC layout design process.Type: GrantFiled: February 26, 2020Date of Patent: February 9, 2021Assignee: REALTEK SEMICONDUCTOR CORPORATIONInventors: Shu-Yu Chang, Shih-Jung Hsu, Han-Chieh Hsieh, Yu-Cheng Lo, Cheng-Yu Tsai
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Publication number: 20200272783Abstract: Disclosed is an IC layout design method capable of improving the result of an IC layout design process including a front-end process and a back-end process. The IC layout design method includes the following steps: executing the front-end process according to initial clock latency setting and thereby generating an initial netlist; executing at least a part of the back-end process according to the initial netlist and thereby obtaining updated clock latency setting; executing at least a part of the front-end process according to the updated clock latency setting and thereby generating an updated netlist; and executing the back-end process according to the updated netlist and thereby obtaining the result of the IC layout design process.Type: ApplicationFiled: February 26, 2020Publication date: August 27, 2020Inventors: SHU-YU CHANG, SHIH-JUNG HSU, HAN-CHIEH HSIEH, YU-CHENG LO, CHENG-YU TSAI
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Patent number: 8106868Abstract: A pixel structure includes a first scan line, a second scan line, a third scan line, a data line, a first thin film transistor (TFT), a second TFT, a third TFT, a first pixel electrode and a second pixel electrode. Particularly, the second scan line and the third scan line are electrically connected with each other. The first TFT is electrically connected with the first scan line and the data line. The second TFT is electrically connected with the first TFT and the second scan line. Furthermore, the third TFT is electrically connected with the third scan line and the data line. In addition, the first pixel electrode and the second pixel electrode are respectively electrically connected with the second TFT and the third TFT.Type: GrantFiled: July 27, 2007Date of Patent: January 31, 2012Assignee: Chunghwa Picture Tubes, Ltd.Inventors: Shu-Yu Chang, Wen-Hsiung Liu
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Patent number: 8017460Abstract: The present invention relates to a method for manufacturing a flat panel display. Herein, the same mask is used to form contact holes and pixel electrodes in the display substrate. Hence, the number of masks needed for manufacturing the flat panel display can be reduced to decrease the manufacturing cost.Type: GrantFiled: June 28, 2010Date of Patent: September 13, 2011Assignee: Chunghwa Picture Tubes, Ltd.Inventors: Shu-Yu Chang, Wen-Hsiung Liu
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Publication number: 20100273283Abstract: The present invention relates to a method for manufacturing a flat panel display. Herein, the same mask is used to form contact holes and pixel electrodes in the display substrate. Hence, the number of masks needed for manufacturing the flat panel display can be reduced to decrease the manufacturing cost.Type: ApplicationFiled: June 28, 2010Publication date: October 28, 2010Applicant: Chunghwa Picture Tubes, Ltd.Inventors: Shu-Yu Chang, Wen-Hsiung Liu
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Patent number: 7772050Abstract: The present invention relates to a method for manufacturing a flat panel display. Herein, the same mask is used to form contact holes and pixel electrodes in the display substrate. Hence, the number of masks needed for manufacturing the flat panel display can be reduced to decrease the manufacturing cost.Type: GrantFiled: October 10, 2008Date of Patent: August 10, 2010Assignee: Chunghwa Picture Tubes, Ltd.Inventors: Shu-Yu Chang, Wen-Hsiung Liu
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Publication number: 20090111199Abstract: The present invention relates to a method for manufacturing a flat panel display. Herein, the same mask is used to form contact holes and pixel electrodes in the display substrate. Hence, the number of masks needed for manufacturing the flat panel display can be reduced to decrease the manufacturing cost.Type: ApplicationFiled: October 10, 2008Publication date: April 30, 2009Applicant: Chunghwa Picture Tubes, Ltd.Inventors: Shu-Yu Chang, Wen-Hsiung Liu
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Publication number: 20080266229Abstract: A pixel structure includes a first scan line, a second scan line, a third scan line, a data line, a first thin film transistor (TFT), a second TFT, a third TFT, a first pixel electrode and a second pixel electrode. Particularly, the second scan line and the third scan line are electrically connected with each other. The first TFT is electrically connected with the first scan line and the data line. The second TFT is electrically connected with the first TFT and the second scan line. Furthermore, the third TFT is electrically connected with the third scan line and the data line. In addition, the first pixel electrode and the second pixel electrode are respectively electrically connected with the second TFT and the third TFT.Type: ApplicationFiled: July 27, 2007Publication date: October 30, 2008Applicant: CHUNGHWA PICTURE TUBES, LTD.Inventors: Shu-Yu Chang, Wen-Hsiung Liu
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Patent number: D1018537Type: GrantFiled: November 7, 2023Date of Patent: March 19, 2024Assignee: HTC CORPORATIONInventors: Shu-Kuen Chang, Natalia Amijo, Ian James McGillivray, Chin-Wei Chou, Yi-Shen Wang, Chih-Sung Fang, Hung-Yu Chen
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Patent number: D1026910Type: GrantFiled: November 7, 2023Date of Patent: May 14, 2024Assignee: HTC CORPORATIONInventors: Shu-Kuen Chang, Natalia Amijo, Ian James McGillivray, Chin-Wei Chou, Yi-Shen Wang, Chih-Sung Fang, Hung-Yu Chen