Abstract: A television cable system includes a headend and a decoder coupled by an in-band communication link and an out of band communication link. The headend controller includes conventional transmission systems for providing a plurality of program channels to the decoder via the in-band communication link. In addition, the headend system includes a plurality of controller inputs which provide data to a download executive circuit which in turn organizes data and transfer it to a transmitter coupled to the out of band data link. Within the decoder, a pair of processors are operative via a communication link therebetween. One processor is of predefine capability and is used to operate a user keyboard as well as conventional tuning and signal processing and descrambling systems to provide television display. The remaining processor includes a memory manager coupled to an out of band transmission receiver which receives downloaded interpretive execution data.

Abstract: A microprocessor communication system couples two microprocessors over a bus comprising a bidirectional data line, a bidirectional sync line and a pair of clock lines. A toggled clock signal serves as a control signal. Each microprocessor outputs data to the data and sync lines and monitors its incoming clock line. When a toggled clock signal is sensed, the receiving microprocessor, when its priorities permit, takes control of the bus and stops outputting data to the data and sync lines. It then detects the incoming data and when incoming data reception is completed, the microprocessor outputs new information to the data and sync lines and toggles its output clock line to signal to the other microprocessor that control of the bus has been relinquished. With the system, the microprocessors operate without the constraints of predetermined time intervals in which to output data or to receive data.