Patents by Inventor Shu Zhou

Shu Zhou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250122191
    Abstract: Provided are certain BCL-2 inhibitors, pharmaceutical compositions thereof, and methods of use thereof.
    Type: Application
    Filed: November 10, 2022
    Publication date: April 17, 2025
    Inventors: Hongbin LIU, Hua XU, Weipeng ZHANG, Rui TAN, Jinhua YU, Yunling WANG, Yangli QI, Yue RONG, Zhuo HUANG, Ling CHEN, Chenglin ZHOU, Lihua JIANG, Shu LIN, Xingdong ZHAO, Weibo WANG
  • Publication number: 20250125310
    Abstract: In some aspects, a package structure includes a substrate and semiconductor devices stacked over the substrate. The semiconductor devices are stacked along a first direction, and at least one of the semiconductor devices comprises one or more pads located on a side surface of the at least one of the semiconductor devices.
    Type: Application
    Filed: November 22, 2023
    Publication date: April 17, 2025
    Inventors: Daiyu LI, Mingkang ZHANG, Chengbao ZHOU, Min WEN, Zhen PAN, Shu WU
  • Patent number: 12276003
    Abstract: Provided in the present disclosure is a method of heat treating a high-strength steel, wherein the high-strength steel comprises, by weight: 0.30-0.45% C, 1.0% or less Si, 0.20-2.5% Mn, 0.20-2.0% Cr, 0.15-0.50% Mo, 0.10-0.40% V, 0.2% or less Ti, 0.2% or less Nb, and a balance of Fe and other alloy elements and impurities, wherein the above alloy elements make Eq(Mn) according to the following formula (1) no less than 1.82, which method comprises the steps of 1) austenitizing; 2) carbide precipitation; and 3) tempering. The heat-treated steel in accordance with the present invention has high strength, high ductility and high toughness at the same time, especially improved reduction in area of tensile sample, so that it is particularly suitable for preparing spring members for vehicle suspension. Eq(Mn)=Mn+0.26Si+3.50P+1.30Cr+2.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: April 15, 2025
    Assignee: IRONOVATION MATERIALS TECHNOLOGY CO., LTD.
    Inventors: Hongliang Yi, Shu Zhou, Dapeng Yang, Huajie Qin, Xiaochuan Xiong, Guodong Wang
  • Publication number: 20250082681
    Abstract: Provided herein are antibodies and antigen-binding fragment thereof targeting CLL1, and chimeric antigen receptors (e.g., monovalent CAR, and multivalent CAR including bi-epitope CAR) having one or more anti-CLL1 antigen-binding fragments thereof. Further provided are engineered immune effector cells (e.g., T cells) expressing the chimeric antigen receptors and methods of use thereof.
    Type: Application
    Filed: August 1, 2022
    Publication date: March 13, 2025
    Inventors: Yafeng ZHANG, Yanliang ZHU, Nannan ZHOU, Shuai YANG, Shu WU
  • Publication number: 20250073782
    Abstract: A method for shape-performance control by ultrasonic rolling combined with selective laser melting is provided, which includes following steps: S1, establishing a three-dimensional model of a component to be processed, and setting printing process parameters; S2, after nitrogen gas is filled into a forming cavity to reduce an oxygen content to a preset value, lowering a forming substrate and raising a powder substrate, laying powder from the powder substrate onto the forming substrate by a scraper, recovering excess powder, and after the laying is completed, melting the powder by a laser galvanometer to form a solid layer, and cycling for several times; S3, performing ultrasonic rolling on a surface of the solid layer; S4, cycling steps S2 and S3 until the component is formed, and ending the cycling; and S5, performing ultrasonic rolling on a surface of a formed component to obtain a solid component.
    Type: Application
    Filed: September 23, 2024
    Publication date: March 6, 2025
    Inventors: Jianzhong ZHOU, Li LI, Junling WU, Ling DAI, Xiankai MENG, Hongmei ZHANG, Pengfei LI, Shu HUANG, Xu FENG, Hansong CHEN
  • Publication number: 20250029954
    Abstract: In one example, a semiconductor device includes a conductive layer, composite structures, conductive posts and first pads. The composite structures may be located on the conductive layer and stacked in a direction perpendicular to the plane in which the conductive layer is located. The composite structure may include a chip, an insulating layer surrounding around the chip, and at least one second pad electrically connected with the chip. The second pad is located on the insulating layer. The second pads of the composite structures are at different locations in the first direction. The first direction is perpendicular to the thickness direction of the composite structures. The conductive posts are located in the insulating layer of the composite structures and each conductive post is connected with one of the second pads and one of the first pads.
    Type: Application
    Filed: December 4, 2023
    Publication date: January 23, 2025
    Inventors: Min Wen, Yingcheng Zhao, Bo Wang, Chengbao Zhou, Zhen Pan, Mingkang Zhang, Shu Wu
  • Publication number: 20250021060
    Abstract: A method and system control a water distribution network. A database is maintained of prior states based on a residential water demand, a tank level, and an energy tariff. A current state of the water distribution network is determined. Rewards are determined and include a tank level constraint, an energy cost, and a toggle count. A query based model is used to determine a set of control points used to control a first prior state. An RL agent is trained based on the prior states and rewards. The RL agent determines a control setpoint (that changes the pump speed) that maintains the tank level, minimizes the energy cost, and complies with the toggle count. The RL agent determines time slots and selects one of the time slots. Hybrid setpoints are generated to control the water distribution network within the selected time slot.
    Type: Application
    Filed: July 1, 2024
    Publication date: January 16, 2025
    Applicant: Autodesk, Inc.
    Inventors: Yuan Zhou, Shu Wang, Harsh Bakulchandra Patel, Michael Pennell, Jieliang Luo, Alexander Lamb
  • Publication number: 20250006495
    Abstract: A method for manufacturing integrated circuit (IC) devices includes forming first and second mask patterns with overlapping and non-overlapping features. Non-overlapping features may be removed before etching a target material layer. A third mask pattern may be formed from the overlapping features and used to etch a target material layer. The third mask pattern may be employed to make regular arrays of substantially rectangular structures. An IC device may include an IC die, an array of structures on a layer of the IC die, and multiple groups of parallel stripes of indentations or depressions in the layer. The structures may each include a transistor and a capacitor.
    Type: Application
    Filed: June 29, 2023
    Publication date: January 2, 2025
    Applicant: Intel Corporation
    Inventors: Allen Gardiner, Nikhil Mehta, Shu Zhou, Travis LaJoie, Shem Ogadhoh, Akash Garg, Van Le, Christopher Pelto, Bernhard Sell
  • Patent number: 12181212
    Abstract: The present application belongs to the technical field of intelligent household appliances, and relates to a prompt method for a refrigerator. The method comprises establishing a dish database according to the menu query information of the user, wherein the dish database comprises dishes and foods corresponding to the dishes; establishing a food database according to each food in the refrigerator and the time when the food enters the refrigerator; detecting food in the current refrigerator, wherein each food in the refrigerator is matched with a corresponding dish according to a dish database, and prompt information is obtained according to the time when the food enters the refrigerator in the food database; and prompting with the prompt information; wherein the prompt information includes expected expiration times and recommended dishes.
    Type: Grant
    Filed: November 12, 2020
    Date of Patent: December 31, 2024
    Assignees: QINGDAO HAIGAO DESIGN & MANUFACTURING CO., LTD., HAIER SMART HOME CO., LTD.
    Inventors: Jian Wu, Shu Zhou, Zhiqun Feng, Zhaojun Fei, Zuowei Yi
  • Patent number: 12124250
    Abstract: The present application belongs to the technical field of smart appliances, and relates to a delivery control method, which comprises the steps of: transferring goods to a delivery device according to the number of personnel; and controlling the delivery device to move to a set target position. By adopting the method, the corresponding quantity of goods can be configured based on the number of personnel, and moved to the target position by the delivery device, so that the required quantity of goods can be distributed to the target position without requiring a user to give control instructions, thereby providing convenience for the user; meanwhile, the required quantity can be distributed at a time, thereby improving the distribution efficiency and improving the user experience. The present application further discloses a delivery control device and a delivery device.
    Type: Grant
    Filed: November 5, 2020
    Date of Patent: October 22, 2024
    Assignees: QINGDAO HAIGAO DESIGN & MANUFACTURING CO., LTD., HAIER SMART HOME CO., LTD.
    Inventors: Jian Wu, Shu Zhou, Zuowei Yi, Zhaojun Fei, Zhiqun Feng
  • Patent number: 11991873
    Abstract: Embodiments herein describe techniques for a semiconductor device including a substrate, a first inter-level dielectric (ILD) layer above the substrate, and a second ILD layer above the first ILD layer. A first capacitor and a second capacitor are formed within the first ILD layer and the second ILD layer. A first top plate of the first capacitor and a second top plate of the second capacitor are formed at a boundary between the first ILD layer and the second ILD layer. The first capacitor and the second capacitor are separated by a dielectric area in the first ILD layer. The dielectric area includes a first dielectric area that is coplanar with the first top plate or the second top plate, and a second dielectric area above the first dielectric area and to separate the first top plate and the second top plate. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: February 14, 2023
    Date of Patent: May 21, 2024
    Assignee: Intel Corporation
    Inventors: Travis W. Lajoie, Abhishek A. Sharma, Van H. Le, Chieh-Jen Ku, Pei-Hua Wang, Jack T. Kavalieros, Bernhard Sell, Tahir Ghani, Gregory George, Akash Garg, Julie Rollins, Allen B. Gardiner, Shem Ogadhoh, Juan G. Alzate Vinasco, Umut Arslan, Fatih Hamzaoglu, Nikhil Mehta, Yu-Wen Huang, Shu Zhou
  • Publication number: 20240049450
    Abstract: Embodiments herein describe techniques for a semiconductor device including a substrate. A first capacitor includes a first top plate and a first bottom plate above the substrate. The first top plate is coupled to a first metal electrode within an inter-level dielectric (ILD) layer to access the first capacitor. A second capacitor includes a second top plate and a second bottom plate, where the second top plate is coupled to a second metal electrode within the ILD layer to access the second capacitor. The second metal electrode is disjoint from the first metal electrode. The first capacitor is accessed through the first metal electrode without accessing the second capacitor through the second metal electrode. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: October 17, 2023
    Publication date: February 8, 2024
    Inventors: Travis W. LAJOIE, Abhishek A. SHARMA, Van H. LE, Chieh-Jen KU, Pei-Hua WANG, Jack T. KAVALIEROS, Bernhard SELL, Tahir GHANI, Gregory GEORGE, Akash GARG, Allen B. GARDINER, Shem OGADHOH, Juan G. ALZATE VINASCO, Umut ARSLAN, Fatih HAMZAOGLU, Nikhil MEHTA, Jared STOEGER, Yu-Wen HUANG, Shu ZHOU
  • Publication number: 20240026513
    Abstract: The present invention relates to a pre-coated steel sheet with aluminum or aluminum alloy pre-coating, manufacturing method and hot stamped components. In the present invention, the method for manufacturing a pre-coated steel sheet with aluminum or aluminum alloy pre-coating relates to the situation of 0.10%?C0?0.30%, the dew point of the mixed atmosphere is controlled in the range of ?40˜?15° C. As for the situation of 0.30%<C0?0.50%, the dew point of the mixed atmosphere is controlled in the range of ?36˜?12° C. The present invention also discloses a pre-coated steel sheet with aluminum or aluminum alloy pre-coating obtained by the method and a hot stamping components obtained by the pre-coated steel sheet. The improved toughness and VDA peak force are achieved for the hot stamping components and then the collision safety of hot stamping components is elevated.
    Type: Application
    Filed: October 28, 2020
    Publication date: January 25, 2024
    Applicant: IRONOVATION MATERIALS TECHNOLOGY CO., LTD.
    Inventors: Hongliang YI, Shu ZHOU, Zeran HOU, Xiaochuan XIONG
  • Patent number: 11832438
    Abstract: Embodiments herein describe techniques for a semiconductor device including a substrate. A first capacitor includes a first top plate and a first bottom plate above the substrate. The first top plate is coupled to a first metal electrode within an inter-level dielectric (ILD) layer to access the first capacitor. A second capacitor includes a second top plate and a second bottom plate, where the second top plate is coupled to a second metal electrode within the ILD layer to access the second capacitor. The second metal electrode is disjoint from the first metal electrode. The first capacitor is accessed through the first metal electrode without accessing the second capacitor through the second metal electrode. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: November 28, 2023
    Assignee: Intel Corporation
    Inventors: Travis W. Lajoie, Abhishek A. Sharma, Van H. Le, Chieh-Jen Ku, Pei-Hua Wang, Jack T. Kavalieros, Bernhard Sell, Tahir Ghani, Gregory George, Akash Garg, Allen B. Gardiner, Shem Ogadhoh, Juan G. Alzate Vinasco, Umut Arslan, Fatih Hamzaoglu, Nikhil Mehta, Jared Stoeger, Yu-Wen Huang, Shu Zhou
  • Publication number: 20230369501
    Abstract: Techniques are provided herein for forming transistor devices with reduced parasitic capacitance, such as transistors used in a memory structure. In an example, a given memory structure includes memory cells, with a given memory cell having an access device and a storage device. The access device may include, for example, a thin film transistor (TFT), and the storage device may include a capacitor. Any of the given TFTs may include a dielectric liner extending along sidewalls of the TFT. The TFT includes a recess (e.g., a dimple) that extends laterally inwards toward a midpoint of a semiconductor region of the TFT. The dielectric liner thus also pinches or otherwise extends inward. This pinched-in dielectric liner may reduce parasitic capacitance between the contacts of the TFT and the gate electrode of the TFT. The pinched-in dielectric liner may also protect the contacts from forming too deep into the semiconductor region.
    Type: Application
    Filed: May 12, 2022
    Publication date: November 16, 2023
    Applicant: Intel Corporation
    Inventors: Cheng Tan, Yu-Wen Huang, Hui-Min Chuang, Xiaojun Weng, Nikhil J. Mehta, Allen B. Gardiner, Shu Zhou, Timothy Jen, Abhishek Anil Sharma, Van H. Le, Travis W. Lajoie, Bernhard Sell
  • Patent number: D1047461
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: October 22, 2024
    Assignees: QINGDAO HAIER INNOVATION TECHNOLOGY CO., LTD., HAIER SMART HOME CO., LTD.
    Inventors: Hui An, Zhaojun Fei, Shu Zhou, Zuowei Yi, Zhiqun Feng, Fei Qin, Linkang Yang
  • Patent number: D1048725
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: October 29, 2024
    Assignees: QINGDAO HAIER INNOVATION TECHNOLOGY CO., LTD., HAIER SMART HOME CO., LTD.
    Inventors: Hui An, Zhaojun Fei, Shu Zhou, Zhiqun Feng, Zuowei Yi, Fei Qin
  • Patent number: D1048726
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: October 29, 2024
    Assignees: QINGDAO HAIER INNOVATION TECHNOLOGY CO., LTD., HAIER SMART HOME CO., LTD.
    Inventors: Hui An, Shu Zhou, Zhaojun Fei, Zuowei Yi, Fei Qin, Zhiqun Feng, Linkang Yang, Min Ge
  • Patent number: D1059037
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: January 28, 2025
    Assignees: QINGDAO HAIER INNOVATION TECHNOLOGY CO., LTD., HAIER SMART HOME CO., LTD.
    Inventors: Hui An, Zhaojun Fei, Shu Zhou, Zuowei Yi, Fei Qin, Zhiqun Feng, Linkang Yang
  • Patent number: D1071417
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: April 15, 2025
    Assignees: QINGDAO HAIER INNOVATION TECHNOLOGY CO., LTD., HAIER SMART HOME CO., LTD.
    Inventors: Hui An, Zuowei Yi, Shu Zhou, Zhaojun Fei, Linkang Yang, Zhiqun Feng, Fei Qin