Abstract: A sensor package structure includes a substrate, a sensor chip disposed on and electrically coupled to the substrate, a plurality of adhesive rings disposed on the sensor chip, a plurality of filtering lenses respectively adhered to the adhesive rings, and an encapsulant that surrounds the above components. A sensing region of the sensor chip has a layout boundary and a plurality of sub-regions that are defined by the layout boundary and that are separate from each other. The adhesive rings are disposed on the sensing region, and each of the adhesive rings surrounds one of the sub-regions. Each of the filtering lenses, a corresponding one of the adhesive rings, and a corresponding one of the sub-regions jointly define a buffering space. The encapsulant is formed on the substrate and covers the layout boundary of the sensor chip.

Abstract: An electrode assembly short circuit identification method includes: during charging, according to preset sampling time points, sequentially acquiring a voltage of an electrode assembly at each of the sampling time points; judging whether the electrode assembly has a continuous voltage drop according to the voltage acquired at each of the sampling time points; and determining whether the electrode assembly has a short circuit according to a judgment result.

Abstract: An electronic package and a manufacturing method thereof are provided, in which a first electronic element and a second electronic element are embedded in a packaging layer, and a circuit structure is formed on the packaging layer and electrically connected to the first electronic element and the second electronic element, where the circuit structure has a heat dissipation portion thermally connected to the first electronic element. Therefore, the heat energy generated by the first electronic element can be quickly dissipated to the outside via the heat dissipation portion, so as to avoid the problem of affecting the operation of the second electronic element due to overheating of the packaging layer.

Abstract: An electronic package and a manufacturing method thereof are provided, in which a first electronic element and a second electronic element are embedded in an encapsulation layer, and a circuit structure is disposed on the encapsulation layer and electrically connected to the first electronic element and the second electronic element. The circuit structure has a hollow area corresponding to the first electronic element, and a heat dissipation structure is disposed in the hollow area to thermally connect the first electronic element. Therefore, the heat energy generated by the first electronic element can be quickly dissipated to the outside via the heat dissipation structure, so as to avoid the problem of affecting the operation of the second electronic element due to the overheating of the encapsulation layer.

Abstract: An event execution method in a game, comprising: determining, according to an execution result of a first game character on a target task, a target character camp to which the first game character belongs, the first game character corresponding to different target tasks in different seasons, the target character camp comprising a first camp or a second camp (S101); determining, according to the target character camp to which the first game character belongs, a target interaction event to be executed by the first game character, different types of character camps corresponding to different interaction events (S102); and in response to a first interaction instruction for the first game character, controlling the first game character to execute the target interaction event (S103).

Abstract: A method and a memory controller for accessing a plurality of memories are provided. The method includes sorting a plurality of blocks of a plurality of memories to correspond to a plurality of disk logical addresses that are sequentially sorted. The plurality of blocks of the plurality of memories include M first blocks of a first memory and N second blocks of a second memory, where M and N are each an integer greater than 1, and the M first blocks of the first memory and the N second blocks of the second memory in the plurality of disk logical addresses are sorted in a non-sequential successive order.

Abstract: A touch functional component, a display panel, and a display apparatus. The touch functional component includes: first electrodes; second electrodes; first connection bridges, at least one of which electrically connects an electrode protrusion of one first electrode with an electrode body of the other first electrode; and second connection bridges, at least one of which electrically connects a first electrode structure with a second electrode structure of the second electrode.

Abstract: A power module includes a printed circuit board (PCB), a magnetic element, primary and secondary winding circuits and a regulator. The magnetic element is disposed on the PCB and has first to fourth sides. The second side is opposite to the first side, the fourth side is opposite to the third side. The primary winding circuit is disposed on the PCB and positioned in a vicinity of the first or second side. The secondary winding circuit is disposed on the first PCB and positioned in a vicinity of the third or fourth side. The regulator includes a switch disposed on the PCB, and coupled to the primary winding circuit. The at least one switch, the primary winding circuit, and the magnetic element are arranged in a first direction in order. A power device is also disclosed herein.

Abstract: The present disclosure provides a power conversion device. The power conversion device includes the multi-level power factor correction circuit, the at least one output capacitor, the at least one input capacitor group, the first resonant conversion circuit and the second resonant conversion circuit. The at least one input capacitor group includes the first input capacitor and the second input capacitor. The at least one output capacitor is connected to an output part of the multi-level power factor correction circuit. The at least one input capacitor group is connected to the at least one output capacitor in parallel. The second input capacitor is connected to the first input capacitor in series. The input part of the first resonant conversion circuit is connected to first input capacitor in parallel. The input part of the second resonant conversion circuit is connected to the second input capacitor in parallel.

Abstract: A display panel and a display apparatus, and the display panel includes a display area and a non-display area located on at least one side of the display area. The display panel includes: a substrate; and antenna modules arranged at a side of the substrate. An orthographic projection of at least one of the antenna modules on the substrate is located within a line winding area of the non-display area.

Abstract: A resonant converter includes primary and secondary circuits, a transformer, a resonant network and a control circuit. The control circuit is coupled to the primary circuit and the secondary circuit, and configured to control primary switches of the primary circuit operating with a switching frequency. At least one of primary switches is configured to be turned on from a first switching moment until a second switching moment. The control circuit is configured to control secondary switches of the secondary circuit, such that at least one of secondary switches is turned on during a first time interval to increase a current of the resonant network in a first flowing direction and an output current in a second flowing direction or equal to zero.

Abstract: An electronic package is provided, in which a plurality of electronic elements are disposed on a plurality of carrier structures, and at least one bridging element is disposed between at least two of the carrier structures to electrically bridge the two carrier structures. Therefore, when there is a need to increase the function of the electronic package, only one electronic element is arranged on a single carrier structure, and there is no need to increase the panel area of the carrier structure, so as to facilitate the control of the panel area of the carrier structure and avoid warpage of the carrier structure due to the oversized panel.

Abstract: An electronic package is provided in which a chip packaging module, an electronic element having a plurality of contacts, and an electronic connector are disposed on a routing structure of a carrier component, so as to communicatively connect with the chip packaging module via the electronic element and the electronic connector, thereby increasing a signal transmission speed.

Abstract: An electronic device includes a memory, a processor, and functional hardware. The memory includes a queue. The processor is configured to write a processing instruction into a target area of the queue. The functional hardware is configured to read the processing instruction from the target area and reserve the target area. The functional hardware generates a completion message according to the processing instruction, and writes the completion message into the target area after the processing instruction is executed. The completion message corresponds to the processing instruction.

Abstract: A touch sensing device, a touch display panel and a touch display panel motherboard. The touch sensing device includes: a first substrate; a plurality of patterned electrodes; and at least two lead layers, each lead layer includes a plurality of electrode leads, the plurality of electrode leads have a one-to-one correspondence relationship with the plurality of patterned electrodes, and each of the plurality of electrode leads is electrically connected to a corresponding one of the plurality of patterned electrodes.

Abstract: A resonant converter includes primary and secondary circuits, a transformer, a resonant network and a control circuit. The control circuit is coupled to the primary circuit and the secondary circuit, and configured to control primary switches of the primary circuit operating with a switching frequency. At least one of primary switches is configured to be turned on from a first switching moment until a second switching moment. The control circuit is configured to control secondary switches of the secondary circuit, such that at least one of secondary switches is turned on during a first time interval to increase a current of the resonant network in a first flowing direction and an output current in a second flowing direction or equal to zero.

Abstract: A resonant converter includes a transformer, a resonant network, control circuit, primary and secondary circuits. One of the primary switches is turned on from a first switching moment until a second switching moment. The resonant network is coupled between the primary circuit and the primary winding. A current of the resonant network changes a direction at a first moment between the first and second switching moments. The secondary circuit is coupled to the secondary winding. One of the secondary switches is turned on during first and second preset time interval to increase the current in a direction by the secondary winding being clamped by a preset voltage, in which the output current is increased in an opposite direction or equal to zero.

Abstract: A resonant converter includes a transformer, a resonant network, control circuit, primary and secondary circuits. One of the primary switches is turned on from a first switching moment until a second switching moment. The resonant network is coupled between the primary circuit and the primary winding. A current of the resonant network changes a direction at a first moment between the first and second switching moments. The secondary circuit is coupled to the secondary winding. One of the secondary switches is turned on during first and second preset time interval to increase the current in a direction by the secondary winding being clamped by a preset voltage, in which the output current is increased in an opposite direction or equal to zero.

Abstract: The present disclosure provides a power conversion device. The power conversion device includes the multi-level power factor correction circuit, the at least one output capacitor, the at least one input capacitor group, the first resonant conversion circuit and the second resonant conversion circuit. The at least one input capacitor group includes the first input capacitor and the second input capacitor. The at least one output capacitor is connected to an output part of the multi-level power factor correction circuit. The at least one input capacitor group is connected to the at least one output capacitor in parallel. The second input capacitor is connected to the first input capacitor in series. The input part of the first resonant conversion circuit is connected to first input capacitor in parallel. The input part of the second resonant conversion circuit is connected to the second input capacitor in parallel.