Abstract: Disclosed are apparatuses, systems, and techniques to perform and facilitate secure ladder computational operations whose iterative execution depends on secret values associated with input data. Disclosed embodiments use masking factors that re-blind secret data without exposing the unmasked secret data between iterations of the ladder computations. Some disclosed embodiments use Montgomery multiplication techniques to facilitate secret data masking by efficiently avoiding modular division operations. Disclosed embodiments significantly reduce the vulnerability of ladder computations to adversarial side-channel attacks.

Abstract: Disclosed are a pixel circuit, a driving method thereof, and a display apparatus. The pixel circuit includes a driving sub-circuit, a writing sub-circuit, a compensation sub-circuit, a reset sub-circuit, and a light-emitting element, the driving sub-circuit provides a driving current to a third node in response to a control signal of a first node; the writing sub-circuit writes a signal of a data signal line to a second node in response to a control signal of a first scan signal line, the signal of the data signal line is a data voltage signal or a reset voltage signal; the compensation sub-circuit writes the reset voltage signal to the third node in response to a control signal of the first scan signal line; the compensation sub-circuit further compensates the first node in response to a control signal of the first scan signal line.

Abstract: A lithium precipitation detection method may include: sending, when a battery management module in the battery pack determines that a change in a charging voltage of the battery pack meets a predetermined condition, a charging request containing a first current to a charging pile for charging, and controlling the battery pack to be charged with the first current for a first predetermined duration and a second predetermined duration, where the first predetermined duration is equal to the second predetermined duration; obtaining, by the battery management module, a first voltage change amount within the first predetermined duration and a second voltage change amount within the second predetermined duration; and determining, when the battery management module determines that a difference between the second voltage change amount and the first voltage change amount is greater than a predetermined voltage threshold, that lithium precipitation occurs in the battery pack.

Abstract: Disclosed are apparatuses, systems, and techniques to perform and facilitate fast and efficient modular computational operations, such as modular division and modular inversion, using shared platforms, including hardware accelerator engines.

Abstract: This disclosure provides an array substrate and a display device. In the array substrate, the pixel driving circuit includes a driving transistor, a first transistor and a second transistor. The driving transistor and the first transistor are P-type transistors, and the second transistor is N-type transistor. The array substrate also includes a base substrate, and a first conductive layer arranged at a side of the base substrate and including: a first conductive portion forming a gate electrode of the driving transistor; a first gate line at a side of the first conductive portion, a part of the first gate line being configured to form a gate electrode of the first transistor; and a second gate line at a side of the first gate line away from the first conductive portion, a part of the second gate line being configured to form a first gate electrode of the second transistor.

Abstract: A display method and an electronic device provide icon animation and starting window image decoding that can be performed in parallel. After a launch operation is detected, an application launch animation may start to be displayed, thus reducing waiting latency and improving user experience.

Abstract: A method includes playing a starting animation and an exiting animation of a first application using a same animationLeash object such that the starting animation and the exiting animation transition smoothly. When playing the starting animation stops, the exiting animation is played.

Abstract: A display substrate, a display panel and a display apparatus are provided. The display substrate includes a base substrate, a first display region, and a second display region, and a light transmittance of the first display region is greater than that of the second display region A plurality of sub-pixels are arranged on the base substrate and in the first display region, wherein the sub-pixels include a first pixel driving circuit and a first light-emitting device, and the first pixel driving circuit includes a compensation transistor, a switching transistor, and a light-emitting device initialization transistor each having an active layer. A scan signal line is provided in the first display region. An orthographic projection of the scan signal line on the base substrate overlaps with that of the active layer of each of the compensation transistor, the switching transistor and the light-emitting device initialization transistor on the base substrate.

Abstract: A display substrate includes first and second display regions, and a base substrate. A plurality of sub-pixels are arranged on a side of the base substrate, where the-sub-pixels include a first pixel driving circuit and a first light-emitting device connected to each other in the first display region, and the first pixel driving circuit includes at least a compensation transistor, a switching transistor, and a light-emitting device initialization transistor each having an active layer. A scan signal line is provided in the first display region. An orthographic projection of the scan signal line on the base substrate overlaps with that of the active layer of each of the compensation transistor and the light-emitting device initialization transistor, or that of the active layer of each of the switching transistor and the light-emitting device initialization transistor on the base substrate.

Abstract: The present disclosure provides a gate driving unit, a gate driving method, a gate driving circuit and a display device. The gate driving unit includes a first clock signal end, a second clock signal end, a third clock signal end, a fourth clock signal end, a first output node control circuitry, a second output node control circuitry, a first control node control circuitry and an output circuitry. According to the present disclosure, it is able to provide a gate driving signal for an N-type transistor in an LTPO pixel circuit, and reduce the number of transistors, thereby to provide a narrow bezel.

Abstract: A display substrate, a display panel and a display apparatus are provided. The display substrate includes a base substrate, a first display region, and a second display region, and a light transmittance of the first display region is greater than that of the second display region A plurality of sub-pixels are arranged on the base substrate and in the first display region, wherein the sub-pixels include a first pixel driving circuit and a first light-emitting device, and the first pixel driving circuit includes a compensation transistor, a switching transistor, and a light-emitting device initialization transistor each having an active layer. A scan signal line is provided in the first display region . An orthographic projection of the scan signal line on the base substrate overlaps with that of the active layer of each of the compensation transistor, the switching transistor and the light-emitting device initialization transistor on the base substrate.

Abstract: The present disclosure provides a pixel circuit. The pixel circuit includes a light emitting element, an energy storage circuit, a driving circuit, a data writing-in circuit, a compensation control circuit, an initialization circuit and a light emitting control circuit. The compensation control circuit is configured to control to connect the control terminal of the driving circuit and the first terminal of the driving circuit under the control of a first control signal. The driving circuit is configured to generate a driving current for driving the light emitting element to emit light under the control of a potential of the control terminal of the driving circuit.

Abstract: The present disclosure provides a gate driving unit, a gate driving method, a gate driving circuit and a display device. The gate driving unit includes a first clock signal end, a second clock signal end, a third clock signal end, a fourth clock signal end, a first output node control circuitry, a second output node control circuitry, a first control node control circuitry and an output circuitry. According to the present disclosure, it is able to provide a gate driving signal for an N-type transistor in an LTPO pixel circuit, and reduce the number of transistors, thereby to provide a narrow bezel.

Abstract: A method for allocating data processing tasks, an electronic device, and a readable storage medium are provided, which relate to the fields of computer vision and artificial intelligence. The method includes: determining a plurality of data processing tasks of a target application for a graphics processor; and allocating, by using a load balancing strategy, the plurality of data processing tasks to a plurality of worker processes created for the target application, wherein the plurality of worker processes are pre-configured with a corresponding graphics processor resource.

Abstract: This disclosure provides an array substrate and a display device. In the array substrate, the pixel driving circuit includes a driving transistor, a first transistor and a second transistor. The driving transistor and the first transistor are P-type transistors, and the second transistor is N-type transistor. The array substrate also includes a base substrate, and a first conductive layer arranged at a side of the base substrate and including: a first conductive portion forming a gate electrode of the driving transistor; a first gate line at a side of the first conductive portion, a part of the first gate line being configured to form a gate electrode of the first transistor; and a second gate line at a side of the first gate line away from the first conductive portion, a part of the second gate line being configured to form a first gate electrode of the second transistor.