Abstract: An all electrically operated nanometer three-dimensional magnetic sensor and its array and a magnetic field measurement method are disclosed. The magnetic sensor includes: a spin current generation layer, a magnetic material layer and an oxide layer in sequence from bottom to top, or a spin current generation layer and a magnetic tunnel junction or a spin valve in sequence from bottom to top. The magnetic sensor array includes a plurality of the magnetic sensors sharing a single spin current generation layer. The method includes: applying an excitation current pulse to a single magnetic sensor, counting the probability of the occurrence of a certain magnetization state in a random process of a bi-stable nanomagnet, based on a relationship between the probability and a magnetic field vector, calculating the magnitude of the components of the magnetic field vector in three-dimensional space direction.

Abstract: The present application provides an in-situ polymerized solid-state battery with a multilayer electrolyte, which comprises an oxidation-resistant polymer layer, which is formed in-situ on the positive electrode, and also comprises a reduction-resistant polymer layer, which is formed in-situ on the negative electrode. The oxidation-resistant polymer through chemical reaction is preset on the positive electrode during the mixing process. And a monomer or initiator that can form reduction-resistant polymer through chemical reaction is preset on the negative electrode plate during the mixing process.

Abstract: The present invention discloses a kind of xylanase mutant and its preparation method and application, which relates to the technical field of genomic engineering and genetic engineering. Such mutant includes one or more mutants obtained by taking xylanase HwXy110A as female parent to conduct saturation mutagenesis to the site of Gly363. Specifically, relates to obtaining 19 mutants through site-directed mutagenesis, and then conducting yeast expression to them, after that, obtaining two mutants with significantly improved specific activity and thermal stability through screening of thermal stability and catalytic activity; the present invention can significantly improve the thermal stability and catalytic efficiency of xylanase through modifying the site of Gly363, and is of important guiding significance for improving the thermal stability and the catalytic efficiency of the 10th family of xylanases and other glycoside hydrolases as well as lays the foundation for its application in industrial production.

Abstract: The present invention discloses a kind of xylanase mutant and its preparation method and application, which relates to the technical field of genomic engineering and genetic engineering. Such mutant includes one or more mutants obtained by taking xylanase HwXyl10A as female parent to conduct saturation mutagenesis to the site of Gly363. Specifically, relates to obtaining 19 mutants through site-directed mutagenesis, and then conducting yeast expression to them, after that, obtaining two mutants with significantly improved specific activity and thermal stability through screening of thermal stability and catalytic activity; the present invention can significantly improve the thermal stability and catalytic efficiency of xylanase through modifying the site of Gly363, and is of important guiding significance for improving the thermal stability and the catalytic efficiency of the 10th family of xylanases and other glycoside hydrolases as well as lays the foundation for its application in industrial production.

Abstract: A display device is disclosed. The display device includes a first display test signal inputting part, configured to input a first display test signal. The display device also includes a first display test signal controlling part, configured to control the input of the first display test signal. The display device also includes a second display test signal inputting part, configured to input a second display test signal. The display device also includes a first test bus, connected to the first display test signal inputting part. The display device also includes a second test bus, connected to the second display test signal inputting part, where the first test bus and the second test bus are connected with each other.

Abstract: A TFT array substrate is disclosed. The array substrate includes gate lines, first and second gate driving circuits, first, second, third, and fourth clock signal lines, first and second initial signal lines, first and second initial transistors, and first, second, third, and fourth clock transistors. The first gate driving circuit includes m stages of first repeating units. The second gate driving circuit includes n stages of second repeating units. Where m and n are positive integers, and 2?m, 2?n.

Abstract: A liquid-crystal display (LCD) panel is disclosed. The LCD panel includes a plurality of pixel units arranged in a matrix, each pixel unit including at least two adjacent pixel sub-units. The LCD panel also includes a plurality of scan lines and a plurality of data lines, each pixel sub-unit being connected to one scan line and to one data line. The LCD panel also includes a driving circuit connected with the scan lines and the data lines, where the driving circuit is configured to drive each of the pixel sub-units via the scan lines and the data lines.

Abstract: A gate driving circuit drives a plurality of gate lines arranged in a display panel. The gate driving circuit includes a shift register having at least two stages of shift register units, and a gate enable circuit. Each shift register unit includes a gate signal output terminal configured to output a gate signal. The gate enable circuit includes a plurality of gate enable units. Each gate enable unit corresponds to one of the shift register units and includes an input terminal connected to the gate signal output terminal of the corresponding shift register unit, an output terminal connected to a corresponding one of the gate lines, and an enable signal input terminal configured to receive an enable signal. Each gate enable unit is configured to selectively output the gate signal of the corresponding shift register unit to the corresponding gate line based on the state of the received enable signal.

Abstract: A method and apparatus for driving an active matrix display panel includes a plurality of scanning lines, a plurality of data lies intersecting the scanning lines, and a plurality of pixel electrodes that are coupled to the scanning lines and the data lines. The method includes activating the scanning lines sequentially, and adjusting common voltages applied to a plurality of common electrodes that are disposed opposite to the pixel electrodes in response to differences in voltage changes generated among the pixel electrodes when the scanning lines changes from an on state to an off state. Therefore a voltage difference between each of the pixel electrodes and a common electrode arranged opposite to the pixel electrode is equal to a target voltage.

Abstract: A TFT array substrate is disclosed. The array substrate includes gate lines, first and second gate driving circuits, first, second, third, and fourth clock signal lines, first and second initial signal lines, first and second initial transistors, and first, second, third, and fourth clock transistors. The first gate driving circuit includes m stages of first repeating units. The second gate driving circuit includes n stages of second repeating units. Where m and n are positive integers, and 2?m, 2?n.

Abstract: A display device is disclosed. The display device includes a first display test signal inputting part, configured to input a first display test signal. The display device also includes a first display test signal controlling part, configured to control the input of the first display test signal. The display device also includes a second display test signal inputting part, configured to input a second display test signal. The display device also includes a first test bus, connected to the first display test signal inputting part. The display device also includes a second test bus, connected to the second display test signal inputting part, where the first test bus and the second test bus are connected with each other.

Abstract: An in-cell touch panel LCD module (100) and a method for driving the same includes a common electrode layer including first and second common electrodes. A control circuit divides the frame time period into a display time period and a touch control time period. A display signal is applied to the common electrode layer during the display time period for a normal LCD display. First and second touch control signals are applied to the first and second common electrodes, respectively, during the touch control time period, so that the electric potential of the first common electrode equals to that of the driving line and the electric potential of the second common electrode equals to that of the sensing line.

Abstract: A control circuit of a touch display panel is disclosed. The control circuit includes a data signal source, a plurality of data signal lines, and a first control circuit. A scan period of the touch display panel includes a display period and a touch scan period. The first control circuit is configured to connect the data signal lines with the data signal source during the display period, and the first control circuit is configured to disconnect the data signal lines from the data signal source during the touch scan period.

Abstract: An in-cell touch panel LCD module (100) and a method for driving the same includes a common electrode layer including first and second common electrodes. A control circuit divides the frame time period into a display time period and a touch control time period. A display signal is applied to the common electrode layer during the display time period for a normal LCD display. First and second touch control signals are applied to the first and second common electrodes, respectively, during the touch control time period, so that the electric potential of the first common electrode equals to that of the driving line and the electric potential of the second common electrode equals to that of the sensing line.

Abstract: A method and apparatus for driving an active matrix display panel includes a plurality of scanning lines, a plurality of data lies intersecting the scanning lines, and a plurality of pixel electrodes that are coupled to the scanning lines and the data lines. The method includes activating the scanning lines sequentially, and adjusting common voltages applied to a plurality of common electrodes that are disposed opposite to the pixel electrodes in response to differences in voltage changes generated among the pixel electrodes when the scanning lines changes from an on state to an off state. Therefore a voltage difference between each of the pixel electrodes and a common electrode arranged opposite to the pixel electrode is equal to a target voltage.

Abstract: A liquid-crystal display (LCD) panel is disclosed. The LCD panel includes a plurality of pixel units arranged in a matrix, each pixel unit including at least two adjacent pixel sub-units. The LCD panel also includes a plurality of scan lines and a plurality of data lines, each pixel sub-unit being connected to one scan line and to one data line. The LCD panel also includes a driving circuit connected with the scan lines and the data lines, where the driving circuit is configured to drive each of the pixel sub-units via the scan lines and the data lines.

Abstract: A gate driving circuit drives a plurality of gate lines arranged in a display panel. The gate driving circuit includes a shift register having at least two stages of shift register units, and a gate enable circuit. Each shift register unit includes a gate signal output terminal configured to output a gate signal. The gate enable circuit includes a plurality of gate enable units. Each gate enable unit corresponds to one of the shift register units and includes an input terminal connected to the gate signal output terminal of the corresponding shift register unit, an output terminal connected to a corresponding one of the gate lines, and an enable signal input terminal configured to receive an enable signal. Each gate enable unit is configured to selectively output the gate signal of the corresponding shift register unit to the corresponding gate line based on the state of the received enable signal.