Abstract: A method of making an integrated circuit includes operations related to forming an oxide layer over a top surface of a substrate; depositing a layer of semiconductor material over the oxide layer; and manufacturing a thermal substrate contact extending through the layer of semiconductor material and the oxide layer to the top surface of the substrate. The thermal substrate contact is against, but does not extend through, the substrate. Manufacturing a thermal substrate contact further includes operations of etching a first opening through the layer of semiconductor material to expose the oxide layer; etching a second opening through the first opening to expose the substrate; and filling the first opening and the second opening with a conductive material.

Abstract: A server includes a computer case including a front window, a GPU assembly mounted in the computer case and including a module bracket, and a locking assembly comprising a latching member. An end of the GPU assembly is located at the front window. The latching member is rotatably mounted at the front window and capable of switching between an unlocking state and a locking state, the module bracket is provided with a locking member corresponding to the latching member. In the locking state the latching member is at least partially inserted into the locking member to limit the GPU assembly in the computer case, and in the unlocking state, the latching member is disengaged from the locking member.

Abstract: A solar cell is provided. The solar cell includes: an N-type silicon substrate having a first surface and a second surface, a tunnel passivation structure and a first passivation and anti-reflection film formed on the first surface, a boron-doped emitter structure layer including a first emitter layer and a second emitter region formed on the second surface, a second passivation and anti-reflection film formed on the emitter structure layer, a first electrode configured to be in electrical contact with the second emitter region, and a second electrode configured to be in electrical contact with the tunnel passivation structure. The solar cell of the present application has a selective emitter structure. The metal contact region has a large junction depth to meet the metallization requirements. The region outside the metal contact region has a small junction depth to improve the optical response.

Abstract: A solar cell is provided. The solar cell includes: an N-type silicon substrate having a first surface and a second surface, a tunnel passivation structure and a first passivation and anti-reflection film formed on the first surface, a boron-doped emitter structure layer including a first emitter layer and a second emitter region formed on the second surface, a second passivation and anti-reflection film formed on the emitter structure layer, a first electrode configured to be in electrical contact with the second emitter region, and a second electrode configured to be in electrical contact with the tunnel passivation structure. The solar cell of the present application has a selective emitter structure. The metal contact region has a large junction depth to meet the metallization requirements. The region outside the metal contact region has a small junction depth to improve the optical response.

Abstract: Disclosed are an earcap structure and an earphone. The earcap structure includes an earcap body provided with an installation channel, the installation channel is sleeved on an outside of an in-ear body of an earphone, a cavity is provided in a wall of the installation channel, and the cavity is filled with a fluid filler to make the cavity squeezed and deformed in response to that an outside of the earcap body is in contact with a concha cavity.

Abstract: A semiconductor device includes a gate structure, a drift region, a source region, a drain region, a first doped region, and a second doped region. The gate structure is over a semiconductor substrate. The drift region is in the semiconductor substrate and laterally extends past a first side of the gate structure. The source region is in the semiconductor substrate and adjacent a second side of the gate structure opposite the first side. The drain region is in the drift region. The first doped region is in the drift region and between the drain region and the gate structure. The second doped region is within the drift region. The second doped region forms a P-N junction with the first doped region at a bottom surface of the first doped region.

Abstract: A method for parking control is provided in the present application, which includes the following steps: determining whether a single-pedal mode is activated; determining whether conditions for deceleration control are met when the single-pedal mode is activated; controlling the new-energy vehicle to decelerate when the conditions for deceleration control are met; determining whether conditions for sending a brake request to a motor controller are met during a process of controlling the new-energy vehicle to decelerate; sending the brake request to the motor controller when the conditions for sending a brake request to the motor controller are met; and sending a parking request to an electronic handbrake when the new-energy vehicle is in the brake mode and the speed of the new-energy vehicle is smaller than the third preset value for a third preset time, enable the new-energy vehicle to enter in a parking mode.

Abstract: Provided are a method and an apparatus for predicting a demanded net energy for maintenance, and an electronic device. The method comprises: acquiring a heart rate data of a target pig (110); and on the basis of the heart rate data and a pre-trained net energy demand prediction model, acquiring a demanded net energy for maintenance of the target pig, wherein the net energy demand prediction model is a neural network model acquired by a productivity parameter-based training (120). According to the method, a prediction based on the heart rate data of a pig is effectively introduced in the prediction process of the demanded net energy for maintenance of the pig. Moreover, the overall prediction process is simplified and optimized, so as to conveniently and quickly predict the demanded net energy for maintenance of the pig in real-time with improved reproducibility and applicability.

Abstract: A super junction structure includes a substrate, wherein the substrate has a first conductivity type. The super junction structure includes an epitaxial layer over the substrate, wherein the epitaxial layer has a second conductivity type opposite the first conductivity type. The super junction structure further includes a bury layer between the epitaxial layer and the substrate, wherein the bury layer has the second conductivity type. The super junction structure further includes a conductive pillar in the epitaxial layer, wherein the conductive pillar has the first conductivity type, sidewalls of the conductive pillar are angled with respect to a top-most surface of the epitaxial layer, a bottom surface of the conductive pillar is rounded, and a top-most surface of the conductive pillar is coplanar with the top-most surface of the epitaxial layer.

Abstract: A mother board for a display panel, having a bonding region and a first panel region including a retaining region and a peripheral region, in which: a first light-emitting functional layer is located in the first panel region; a first adhesive layer surrounding the first panel region is adhered to a cover plate and a base substrate, and an orthographic projection of an edge of the first adhesive layer close to the bonding region on the base substrate defines a first pattern; the first light-emitting functional layer in the retaining region and the peripheral region are spaced by a first spacing layer, an orthographic projection of which on the base substrate partially overlaps with the first pattern and form a closed second pattern therewith. The orthographic projection of the first spacing layer on the base substrate is located within that of the first adhesive layer on the base substrate.

Abstract: A formal verification method for a certificate storage smart contract is provided. The method includes: obtaining the certificate storage smart contract, and performing certificate storage, forensic, and certificate storage and forensic authority granting according to different production environments and authority; adding standardization statements of formal standardization into the certificate storage smart contract; and obtaining a verification result by performing model verification on the certificate storage smart contract into which the standardization statements of the formal verification are added. A computer device and a non-transitory computer-readable storage medium are further provided.

Abstract: This invention provides a box for accommodating capacitor including bottom plate, two first side plates, two second side plates, fixed engagement structure and movable engagement structure. First side plates are disposed opposite to each other. Second side plates are disposed opposite to each other. Side plates are respectively connected to a plurality of side edges of bottom plate so that bottom plate and side plates together form accommodation space. Fixed engagement structure and the movable engagement structure are respectively connected to first side plates. Fixed engagement structure and movable engagement structure are located at a side of accommodation space that is located farthest from bottom plate. Movable engagement structure includes cantilever part and engagement part. Cantilever part is connected to one of first side plates. Engagement part protrudes from movable end part of cantilever part.

Abstract: Embodiments of this application provide a display panel and an electronic device. For the display panel, in an under-display photographing area, an electrochromic layer is disposed on a light-emitting side of a display layer, and the electrochromic layer does not overlap a pixel area in a direction perpendicular to a plane on which the display panel is located; a first electrode layer is disposed on a side that is of the electrochromic layer and that is close to the display layer, and a second electrode layer is disposed on a side that is of the electrochromic layer and that is away from the display layer; and the electrochromic layer has a first light absorption feature under action of a first voltage difference, and has a second light absorption feature under action of a second voltage difference.

Abstract: The present disclosure provides a method and apparatus for acquiring a pre-trained model, an electronic device and a storage medium, and relates to the field of artificial intelligence, such as the natural language processing field, the deep learning field, or the like. The method may include: adding, in a process of training a pre-trained model using training sentences, a learning objective corresponding to syntactic information for a self-attention module in the pre-trained model; and training the pre-trained model according to the defined learning objective. The solution of the present disclosure may improve a performance of the pre-trained model, and reduce consumption of computing resources, or the like.

Abstract: A semiconductor device includes a gate structure, a drift region, a source region, a drain region, and a doped region. The gate structure is over a semiconductor substrate. The drift region is in the semiconductor substrate and laterally extends past a first side of the gate structure. The source region is in the semiconductor substrate and adjacent a second side of the gate structure opposite the first side. The drain region is in the drift region. The doped region is in the drift region and between the drain region and the gate structure. From a top view the doped region has a strip pattern extending in parallel with a strip pattern of the gate structure.

Abstract: A method of making an integrated circuit includes surrounding a first bias pad with dielectric material of a buried oxide layer. The method includes adding dopants to a layer of semiconductor material over the first bias pad. The method includes depositing a gate dielectric and a gate electrode over a top surface of the layer of semiconductor material. The method includes etching the gate dielectric and the gate electrode to isolate a gate electrode over the layer of semiconductor material. The method includes depositing an inter layer dielectric (ILD) material over the gate electrode and the layer of semiconductor material. The method includes etching at least one bias contact opening down to the first bias pad. The method includes filling the at least one bias contact opening with a bias contact material. The method includes electrically connecting at least one bias contact to an interconnect structure of the semiconductor device.

Abstract: A micro three-dimensional printing device is provided. The micro three-dimensional printing device includes a micro-LED display projector configured to emit image light; a material platform facing the micro-LED display projector and configured to receive the image light; a movable printing plate configured to hold a three-dimensional printed object; and a moving mechanism connected with the movable printing plate and configured to move the movable printing plate.

Abstract: A liquid cooling device includes first cold plates, second cold plates, a water divider, a first inlet pipe, a first outlet pipe, first connection pipes, second inlet pipes, second outlet pipes, second connection pipes. The water divider has inner inlet connectors and inner outlet connectors. The first inlet pipe connects one inner inlet connector and one first cold plate. The first outlet pipe connects one inner outlet connector and another one first cold plate. The first connection pipes each connect different two of the other first cold plates. The second inlet pipes respectively connect the other inner inlet connectors and some second cold plates. The second outlet pipes respectively connect the other inner outlet connectors and some second cold plates. The second connection pipes each connect different two second cold plates.