Patents by Inventor Shubha Kumbadakone

Shubha Kumbadakone has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7594073
    Abstract: The memory content may be cached in the non-volatile cache when a computing system is entering S4 state. The non-volatile cache may be coupled to a bus that connects the disk drive with the disk controller. When resuming from S4 state, the memory content may be read from the non-volatile cache rather than from the slow disk drive, which facilitates instant-on resuming for the system. The caching process may be performed in an OS-transparent manner. During the caching process, data with contiguous addresses may be merged into a block of data. A mapping table may be created and stored in the non-volatile cache which includes multiple entries, each for a block of data. The mapping table facilitates data reading from the non-volatile cache to provide instant-on resuming from S4 state.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: September 22, 2009
    Assignee: Intel Corporation
    Inventors: Ulf R. Hanebutte, Ram Chary, Pradeep Sebastian, Shubha Kumbadakone, Shreekant S. Thakkar
  • Publication number: 20080082743
    Abstract: The memory content may be cached in the non-volatile cache when a computing system is entering S4 state. The non-volatile cache may be coupled to a bus that connects the disk drive with the disk controller. When resuming from S4 state, the memory content may be read from the non-volatile cache rather than from the slow disk drive, which facilitates instant-on resuming for the system. The caching process may be performed in an OS-transparent manner. During the caching process, data with contiguous addresses may be merged into a block of data. A mapping table may be created and stored in the non-volatile cache which includes multiple entries, each for a block of data. The mapping table facilitates data reading from the non-volatile cache to provide instant-on resuming from S4 state.
    Type: Application
    Filed: September 29, 2006
    Publication date: April 3, 2008
    Inventors: Ulf R. Hanebutte, Ram Chary, Pradeep Sebestian, Shubha Kumbadakone, Shreekant S. Thakkar
  • Publication number: 20080082752
    Abstract: A computing system may conserve more power by entering S4 state than S3 state over long periods of inactivity and also have an instant-on capability when assuming from S4 state by using a fast accessible non-volatile cache (e.g., flash memory). Rather than storing memory content to a disk drive, the memory content may be cached in the non-volatile cache when the system is entering S4 state. The non-volatile cache may be coupled to a bus that connects the disk drive with the disk controller. When resuming from S4 state, the memory content may be read from the non-volatile cache rather than from the slow disk drive. Both the caching and resuming processes may be performed in an OS-transparent manner. A mapping table may be created and stored in the non-volatile cache during the caching process to provide efficient reading from the non-volatile cache during the resuming process.
    Type: Application
    Filed: September 29, 2006
    Publication date: April 3, 2008
    Inventors: Ram Chary, Shreekant S. Thakkar, Ulf R. Hanebutte, Pradeep Sebestian, Shubha Kumbadakone