Abstract: The present disclosure provides a system (100) and a method (200) for real-time debugging of a processor (102). The system includes a debugging unit (104) configured to receive a first set of instructions from the processor. The first set of instructions includes a set of function calls and/or a set of jump instructions. The debugging unit further includes a skip list unit (106) including a skip set of instructions. The skip list unit is configured to remove, from the first set of instructions, the skip set of instructions to generate a second set of instructions. The debugging unit includes a loop exclusion unit (108) configured to determine loops of instructions based on loop unrolling of the second set of instructions to generate a third set of instructions by removing loops of instructions from the second set of instructions. The debugging unit is configured to store the third set of instructions.

Abstract: State of art techniques that utilize spatial association based Table structure Recognition (TSR) have limitation in selecting minimal but most informative word pairs to generate digital table representation. Embodiments herein provide a method and system for TSR from an table image via deep spatial association of words using optimal number of word pairs, analyzed by a single classifier to determine word association. The optimal number of word pairs are identified by utilizing immediate left neighbors and immediate top neighbors approach followed redundant word pair elimination, thus enabling accurate capture of structural feature of even complex table images via minimal word pairs.

Abstract: A multiport universal serial bus (USB)-C based power supply device including a USB type-C port configured to supply power to a connected type-C external device, at least one USB type-A port configured to supply power to at least one connected type-A external sink device, a configurable power source and a controller operatively coupled with the configurable power source, the USB type-C port and at least one of the USB type-A port. The controller is configured to generate, based on the generated type-C and type-A power profile, at least one of a digital communication signal and a feedback control signal, which correspond to a power value to be supplied, based on the generated power profile, to the type-C port and the at least one type-A port respectively. Operation of the multiport USB-C based power supply device by a single controller facilitates compact construction of the multiport USB-C based power supply device.

Abstract: A system for watermarking a USB Type-C and PD protocol hardware sub-system existing as a part of a SOC/IC system includes a tester to generate a watermarking signal, a device under test (DUT), wherein the DUT is configured with a USB Type-C port with power delivery implementation and including a hardware subsystem configured for watermarking the DUT and transmit a response signal upon receipt of the watermarking signal from the tester. The tester includes a controller including one or more processors that execute a set of executable instructions that are stored in a memory, upon which execution, the processor causes the controller to generate the watermarking signal, the watermarking signal comprises a custom signal and a custom packet associated with a configured custom signal stored in a data buffer that is associated with the SOC/IC system, and transmit the watermarking signal on one or more configuration channel (CC) lines.

Abstract: The present disclosure provides an apparatus and a method for implementing a USB-IF certified programmable power supply algorithm on a USB-C port. The method involves using a software code running on a microcontroller which monitors voltage and current being supplied by a power supply controller IC on a VBUS line of the USB-C port. Based on the detected voltage/current corrective actions are taken by the software code to bring the voltage/current to accepted levels as requested by a port partner. Further, a PPS accelerator is configured to compute an average or a new current/voltage value and provide the computed average or a new current/voltage value to a microcontroller for subsequent decision making and for other related assessment process.

Abstract: State of art techniques that utilize spatial association based Table structure Recognition (TSR) have limitation in selecting minimal but most informative word pairs to generate digital table representation. Embodiments herein provide a method and system for TSR from an table image via deep spatial association of words using optimal number of word pairs, analyzed by a single classifier to determine word association. The optimal number of word pairs are identified by utilizing immediate left neighbors and immediate top neighbors approach followed redundant word pair elimination, thus enabling accurate capture of structural feature of even complex table images via minimal word pairs.

Abstract: The present disclosure provides a system and method for reception of BMC data in USB PD communication. The system comprises an analog block and a digital block with the digital block further comprising an idle detection mechanism, and a digital controller for rejecting noise and auto correcting of received BMC signal. The BMC data is typically processed by means of varied functions such as comparison by a threshold comparator on the analog block with programmable reference, and other components of the digital block so as to realize aspects such as noise filtering of BMC data by changing the reference dynamically based on comparison of the width of threshold comparator output signal with average signal widths which is computed during the preamble phase of USB PD communications.

Abstract: Systems and methods for automating information extraction from piping and instrumentation diagrams is provided. Traditional systems and methods do not provide for end-to-end and automated data extraction from the piping and instrumentation diagrams.

Abstract: The present disclosure provides a system and method for soft start scheme to control inrush current for VCONN in USB-C interface. The system includes: a serial shift register having flip-flops and adapted to obtain clock with programmable clock divider, frequency of clock changes dynamically by programming programmable clock divider; a resistor DAC unit configured to increment voltage in step-wise manner; a pass gate switch comprising NMOS gate switch and a PMOS gate switch connected in parallel and operatively coupled to the resistor DAC unit and configured to control an input voltage to a VCONN charge pump, said input voltage being in incremental steps such that the VCONN charge pump pumps an output voltage; and a VCONN switch gate operatively coupled to the VCONN charge pump and configured to supply the output voltage in controlled, incremental steps, such that the output voltage is ramped slowly to control the inrush current.

Abstract: The present disclosure provides a transceiver for transmission of data coded according to a Bi-phase Mark Coding (BMC) protocol through a configurable channel (CC) of a USB type-C port. The transceiver includes: a transmitter configured to receive the coded BMC data and transmit the coded BMC data through the CC line. The transmitter includes: a low dropout (LDO) regulator configured to receive a reference voltage (VREF) and generate a local programmable supply voltage; a delay control logic configured to receive the BMC data, and including flipflops connected in series, wherein, output from each flipflop is delayed with respect to input received by the flipflop; and a transmitter driver configured to receive output from each flipflop of the delay control logic, the transmitter driver including a NMOS switches and a PMOS switches. The transceiver includes an eye correction receiver configured to receive output from the transmitter driver of the transmitter.

Abstract: A multiport universal serial bus (USB)-C based power supply device including a USB type-C port configured to supply power to a connected type-C external device, at least one USB type-A port configured to supply power to at least one connected type-A external sink device, a configurable power source and a controller operatively coupled with the configurable power source, the USB type-C port and at least one of the USB type-A port. The controller is configured to generate, based on the generated type-C and type-A power profile, at least one of a digital communication signal and a feedback control signal, which correspond to a power value to be supplied, based on the generated power profile, to the type-C port and the at least one type-A port respectively. Operation of the multiport USB-C based power supply device by a single controller facilitates compact construction of the multiport USB-C based power supply device.

Abstract: The present disclosure provides an apparatus and a method for implementing a USB-IF certified programmable power supply algorithm on a USB-C port. The method involves using a software code running on a microcontroller which monitors voltage and current being supplied by a power supply controller IC on a VBUS line of the USB-C port. Based on the detected voltage/current corrective actions are taken by the software code to bring the voltage/current to accepted levels as requested by a port partner. Further, a PPS accelerator is configured to compute an average or a new current/voltage value and provide the computed average or a new current/voltage value to a microcontroller for subsequent decision making and for other related assessment process.

Abstract: The present disclosure provides a transceiver for transmission of data coded according to a Bi-phase Mark Coding (BMC) protocol through a configurable channel (CC) of a USB type-C port. The transceiver includes: a transmitter configured to receive the coded BMC data and transmit the coded BMC data through the CC line. The transmitter includes: a low dropout (LDO) regulator configured to receive a reference voltage (VREF) and generate a local programmable supply voltage; a delay control logic configured to receive the BMC data, and including flipflops connected in series, wherein, output from each flipflop is delayed with respect to input received by the flipflop; and a transmitter driver configured to receive output from each flipflop of the delay control logic, the transmitter driver including a NMOS switches and a PMOS switches. The transceiver includes an eye correction receiver configured to receive output from the transmitter driver of the transmitter.

Abstract: Systems and methods for providing VCONN to configuration channel line in USB-interface, involving a sense switch and a VCONN switch coupled with the VCONN supply and a gate control unit; an over current protection (OCP) reference current unit configured to provide a predetermined current through the sense branch; a preamplifier configured to amplify a differential voltage between source terminal voltages of the sense switch and the VCONN switch; an Over Current detection comparator configured to generate an Over Current fault signal when the source terminal voltage at the VCONN switch is lower than the source terminal voltage at the sense switch; and a control unit configured to: activate, upon receipt of the generated Over Current fault signal, the gate control unit, wherein the gate control unit, upon activation, is configured to disable the sense switch and the VCONN switch respectively to protect the VCONN and CC_P from over current.

Abstract: Systems involve a dividing unit configured to divide functionality in digital hardware portion through finite state machines (FSMs), protocol timers and PD message accelerator blocks for reducing code size such that their implementation combined with a low code-size firmware (FW) interacts, using a control unit operatively coupled to the dividing unit, with the hardware portion to provide updates in an USB-PD specification, wherein at least one of the FSMs configured to run at a predefined UI clock frequency to enable low active power to the system, a wake-up unit running at least on 4 times of UI clock frequency and detects data edge on configuration channel line to wake-up the entire system from sleep state, wherein a plurality of standard power saving mechanisms selected from clock gating and frequency reduction for clocks are implemented to enable low power corresponding to the system and bypass paths at each level of implementation.

Abstract: The present disclosure provides a system and method for soft start scheme to control inrush current for VCONN in USB-C interface. The system includes: a serial shift register having flip-flops and adapted to obtain clock with programmable clock divider, frequency of clock changes dynamically by programming programmable clock divider; a resistor DAC unit configured to increment voltage in step-wise manner; a pass gate switch comprising NMOS gate switch and a PMOS gate switch connected in parallel and operatively coupled to the resistor DAC unit and configured to control an input voltage to a VCONN charge pump, said input voltage being in incremental steps such that the VCONN charge pump pumps an output voltage; and a VCONN switch gate operatively coupled to the VCONN charge pump and configured to supply the output voltage in controlled, incremental steps, such that the output voltage is ramped slowly to control the inrush current.

Abstract: Systems involve a dividing unit configured to divide functionality in digital hardware portion through finite state machines (FSMs), protocol timers and PD message accelerator blocks for reducing code size such that their implementation combined with a low code-size firmware (FW) interacts, using a control unit operatively coupled to the dividing unit, with the hardware portion to provide updates in an USB-PD specification, wherein at least one of the FSMs configured to run at a predefined UI clock frequency to enable low active power to the system, a wake-up unit running at least on 4 times of UI clock frequency and detects data edge on configuration channel line to wake-up the entire system from sleep state, wherein a plurality of standard power saving mechanisms selected from clock gating and frequency reduction for clocks are implemented to enable low power corresponding to the system and bypass paths at each level of implementation.

Abstract: Systems and methods for providing VCONN to configuration channel line in USB-interface, involving a sense switch and a VCONN switch coupled with the VCONN supply and a gate control unit; an over current protection (OCP) reference current unit configured to provide a predetermined current through the sense branch; a preamplifier configured to amplify a differential voltage between source terminal voltages of the sense switch and the VCONN switch; an Over Current detection comparator configured to generate an Over Current fault signal when the source terminal voltage at the VCONN switch is lower than the source terminal voltage at the sense switch; and a control unit configured to: activate, upon receipt of the generated Over Current fault signal, the gate control unit, wherein the gate control unit, upon activation, is configured to disable the sense switch and the VCONN switch respectively to protect the VCONN and CC_P from over current.

Abstract: The present disclosure provides a system and method including: a first USB port and one or more second USB ports provided on the multi-port adapter; an AC-DC conversion configured to measure a first load current at the first USB port; a plurality of buck-boost mode power conversion units, each configured to measure a second load current at a corresponding one or more second USB ports; and a system controller configured to measure the first load current and the one or more second load currents, wherein the system controller is configured to compare and adjust the measured first load current and the measured one or more second load currents to, respectively, a first rated current and a corresponding second rated current for each of the one or more second USB ports.

Abstract: Systems and methods for automating information extraction from piping and instrumentation diagrams is provided. Traditional systems and methods do not provide for end-to-end and automated data extraction from the piping and instrumentation diagrams.