Patents by Inventor Shubhra Singh

Shubhra Singh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210281800
    Abstract: The present disclosure relates to methods and devices for wireless communication including a UE and another UE or a base station. The UE can communicate via a current call communication with a current call quality, where the current call communication can be a RAT. The UE can also determine whether a current call activity is inactive for a time period. Additionally, the UE can maintain the current call quality when the current call activity is inactive for the time period. The UE can also monitor one or more data packets over the current call communication for the time period. Further, the UE can stop downgrading to a lower call quality when the current call activity is inactive for the time period. The UE can also switch the current call communication to a new call communication when the current call activity is inactive for the time period.
    Type: Application
    Filed: March 5, 2020
    Publication date: September 9, 2021
    Inventors: Shubhra SINGH, Sandeep PADUBIDRI RAMAMURTHY, Shankar Ganesh LAKSHMANASWAMY
  • Publication number: 20200329128
    Abstract: Various protocols have been defined that computing devices can use to establish a real-time communication session. These protocols can describe techniques by which the computing devices can negotiate the parameters to use in the communication session, so that each device transmits media that the other device or devices are able to accept. Feedback mechanisms aid in correcting issues with media streams. Techniques can be used to determine the feedback mechanisms supported by a computing device on a session, when the computing device indicates that the computing device supports feedback, but does not specify the types of feedback that the computing device supports. These techniques can include sending a message that requires a response. When the response is received, the sending device can determine a feedback type supported by the receiving device.
    Type: Application
    Filed: April 9, 2019
    Publication date: October 15, 2020
    Inventors: Shubhra SINGH, Sandeep PADUBIDRI RAMAMURTHY, Shankar Ganesh LAKSHMANASWAMY
  • Patent number: 9329210
    Abstract: An integrated circuit (IC) includes a reference voltage generator, a voltage regulator, a reset controller, and a voltage monitoring circuit. The reference voltage generator generates first and second reference voltages, and the voltage regulator generates a supply voltage. The reset controller stabilizes the first and second reference voltages in a first predetermined time period, and generates a power down signal after the first predetermined time period. The voltage monitoring circuit compares a level of the supply voltage with a level of the second reference voltage after the first predetermined time period and generates a (low) voltage monitor signal. The reset controller also generates a (high) reset signal when the supply voltage is greater than the second reference voltage.
    Type: Grant
    Filed: November 29, 2014
    Date of Patent: May 3, 2016
    Assignee: FREESCALE SEMIOCNDUCTOR, INC.
    Inventors: Sunny Gupta, Nitin Pant, Shubhra Singh
  • Patent number: 8543856
    Abstract: A semiconductor device having a low power mode includes a buffer circuit associated with an interface pad, a power management controller (PMC), and a wakeup unit for waking up a part of the device from the low power mode. The buffer circuit is disabled in the low power mode by asserting a power on reset (POR) signal associated with the PMC. A wakeup signal is generated and provided to the wakeup unit from an analog power supply associated with the buffer circuit.
    Type: Grant
    Filed: August 20, 2011
    Date of Patent: September 24, 2013
    Assignee: Freescale Semiconductor Inc
    Inventors: Shubhra Singh, Kumar Abhishek, Mukesh Bansal
  • Publication number: 20130047016
    Abstract: A semiconductor device having a low power mode includes a buffer circuit associated with an interface pad, a power management controller (PMC), and a wakeup unit for waking up a part of the device from the low power mode. The buffer circuit is disabled in the low power mode by asserting a power on reset (POR) signal associated with the PMC. A wakeup signal is generated and provided to the wakeup unit from an analog power supply associated with the buffer circuit.
    Type: Application
    Filed: August 20, 2011
    Publication date: February 21, 2013
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Shubhra SINGH, Kumar Abhishek, Mukesh Bansal
  • Patent number: 8354879
    Abstract: A power switch for an integrated circuit provides a stepped profile supply potential. A supply potential generation block generates the stepped profile output supply to control the ramp rate of the output in order to prevent a false trigger of electrostatic discharge at the pads of the integrated circuit.
    Type: Grant
    Filed: January 11, 2011
    Date of Patent: January 15, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Mukesh Bansal, Kumar Abhishek, Shubhra Singh
  • Publication number: 20120176188
    Abstract: A power switch for an integrated circuit provides a stepped profile supply potential. A supply potential generation block generates the stepped profile output supply to control the ramp rate of the output in order to prevent a false trigger of electrostatic discharge at the pads of the integrated circuit.
    Type: Application
    Filed: January 11, 2011
    Publication date: July 12, 2012
    Applicant: FREESCALE SEMICONDUCTOR, INC
    Inventors: Mukesh Bansal, Kumar Abhishek, Shubhra Singh