Abstract: A quadrature VCO includes a first oscillator unit and a second oscillator unit. Each of the first and second oscillator unit is composed of a DC bias source, a complementary cross-coupled pair, an LC resonator unit, a frequency-doubling sub-harmonic coupler unit, and a ground terminal. When the LC resonator units of the first and second oscillator units are operated, four signals of different phases can be outputted via the output terminals. In this way, the output phase difference of the two oscillator units can keep 180 degrees and allow the two oscillator units to mutually inject signals to generate quadrature output signals.

Abstract: A synthesis method of Sigma-Delta modulator capable of relaxing circuit specification and reducing power consumption, comprising the following steps: firstly, set a target bandwidth and a target performance; upon obtaining a Noise Transfer Function (NTF), perform coefficient synthesis a first time, to ascertain a plurality sets of first performance results corresponding to said NTF, and obtain a plurality sets of first circuit specifications fulfilling said said target performance, through analyzing circuit non-ideal effect of said first performance results. Next, increase an oversampling ratio of parameters, to obtain a plurality sets of second performance results, and a plurality sets of second circuit specifications. Then, increase quantizer bit number, and increase attenuation quantity, to obtain a plurality sets of third circuit specifications. Finally, compare said first, second and third circuit specifications, to select one of greatest variation to perform calibrations.

Abstract: A quadrature VCO includes a first oscillator unit and a second oscillator unit. Each of the first and second oscillator unit is composed of a DC bias source, a complementary cross-coupled pair, an LC resonator unit, a frequency-doubling sub-harmonic coupler unit, and a ground terminal. When the LC resonator units of the first and second oscillator units are operated, four signals of different phases can be outputted via the output terminals. In this way, the output phase difference of the two oscillator units can keep 180 degrees and allow the two oscillator units to mutually inject signals to generate quadrature output signals.

Abstract: An implantable closed-loop micro-stimulation device, comprising: a wireless receiver, a wireless energy conversion and storage interface, a demodulator circuit, a modulator, a main controller, a front end sensor, and a stimulation generator. The wireless energy conversion and storage interface receives AC signal through the wireless receiver, and converts it into DC voltage to charge the battery and provide a stable operation voltage. The demodulator circuit receives a wireless control signal through the wireless receiver, and demodulates it into control data and a control clock, and outputs them to the main controller. When the main controller determines that the control data is correct, the main controller outputs the stimulation parameters to the front end sensor and the stimulation generator based on the control data and the control clock, so that the stimulation generator generates a stimulation pulse signal for applying it onto the stimulation object.

Abstract: The present invention discloses an FFT-based ADC calibration system able to solve the problems of capacitor mismatch and finite Op-Amp open loop gain, which result in that the radix of the gain of each stage is not exactly equal to 2. The present invention uses an FFT processor to calculate the real radix of each stage and uses a digital method to generate new digital outputs. As the present invention can compensate the finite gain of Op-Amp, the specification of Op-Amp is not so critical in designing ADC. Therefore, the low-gain Op-Amp can be used to reduce the power consumption of ADC. Further, the FFT-based calibration technology can considerably promote the performance of ADC.

Abstract: The present invention discloses a sigma-delta modulator architecture capable of automatically improving dynamic range and a method for the same. Based on the concept that different dynamic ranges of a sigma-delta modulator can be obtained via adjusting the signal power gain thereof, the present invention provides a novel algorithm to implement an automation program. The present invention finds out several sets of dynamic-range curves to improve the overall dynamic range. Via a high-level sigma-delta modulator architecture, the present invention can calculate the required feedforward coefficients. Further, the present invention install in the sigma-delta modulator architecture with four additional components, including a peak detection unit, a comparator unit, a digital coefficient control unit and a switch unit, to dynamically detect the output of the sigma-delta modulator and dynamically modify the feedforward coefficient of the sigma-delta modulator.

Abstract: The present invention discloses a sigma-delta modulator architecture capable of automatically improving dynamic range and a method for the same. Based on the concept that different dynamic ranges of a sigma-delta modulator can be obtained via adjusting the signal power gain thereof, the present invention provides a novel algorithm to implement an automation program. The present invention finds out several sets of dynamic-range curves to improve the overall dynamic range. Via a high-level sigma-delta modulator architecture, the present invention can calculate the required feedforward coefficients. Further, the present invention install in the sigma-delta modulator architecture with four additional components, including a peak detection unit, a comparator unit, a digital coefficient control unit and a switch unit, to dynamically detect the output of the sigma-delta modulator and dynamically modify the feedforward coefficient of the sigma-delta modulator.

Abstract: The present invention discloses an FFT-based ADC calibration system able to solve the problems of capacitor mismatch and finite Op-Amp open loop gain, which result in that the radix of the gain of each stage is not exactly equal to 2. The present invention uses an FFT processor to calculate the real radix of each stage and uses a digital method to generate new digital outputs. As the present invention can compensate the finite gain of Op-Amp, the specification of Op-Amp is not so critical in designing ADC. Therefore, the low-gain Op-Amp can be used to reduce the power consumption of ADC. Further, the FFT-based calibration technology can considerably promote the performance of ADC.

Abstract: A FFT/IFFT processor and an intellectual property (IP) builder are disclosed. Which include a circuit applying the mixed-radix algorithm and a parametric graphic user interface (GUI). The circuit is for a parametric IP builder. The parametric GUI is for user to complete hardware design and functional test of FFT/IFFT processor by software. The IP builder could accelerate the progress of processor design and SOC integration.

Abstract: An LED display system with embedded microprocessors is disclosed. It includes an image signal source, an image capture controller, a digital multiplexed encoder, a digital multiplexed decoder and a LED display panel. The image signal source provides signals of static or dynamic images. The image capture controller transmits the control signals and image data. The digital multiplexed encoder is for data encoding and debugging. The digital multiplexed decoder is for data decoding to obtain the color signals, which provides LED with curve correction. The LED display panel displays static or dynamic images. The LED display system could transform images stored in the computer into signals for controlling LED brightness so image data can be transmitted to LED display panel and displayed on the LED display panel successfully.