Patents by Inventor Shuhei Tsuchita

Shuhei Tsuchita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5878942
    Abstract: Methods and apparatuses to perform soldering while the chip is held by a head under melted solder condition are disclosed. Solder bumps 3 are formed on the chip 1, and they are opposite to terminals 11 on a mounting board 10. Furthermore, a heating block 21 is located at the back of the chip, and it raises the temperature of the solder bumps 3 on the chip 1 to a melting point by heating the chip back by conduction. Preferably, another heating block 22 is located at the back of the mounting board 10. Soldering is performed by bringing the solder bumps 3 into contact with the terminals 11 while the solder is melted.
    Type: Grant
    Filed: September 11, 1996
    Date of Patent: March 9, 1999
    Assignee: International Business Machines Corporation
    Inventors: Yasushi Kodama, Shuhei Tsuchita, Yutaka Tsukada, Yasumitsu Orii, Hideo Ohkuma
  • Patent number: 5784781
    Abstract: A manufacturing process for an organic chip carrier is disclosed which permits one to form a substantially bowl-shaped via hole in the substrate of the chip carrier, which makes it easy to deposit a conductive layer having a substantially uniform thickness on the sidewall of the via hole. In accordance with the manufacturing process, photosensitive resin 3 is provided on a substrate 1 in a thickness which is the thickness necessary for a final insulating layer plus a thickness to be removed by, for example grinding, the photosensitive resin 3. Cavities are then formed in the photosensitive resin 3 in a predetermined pattern by exposure and development. The photosensitive resin 3 formed with the cavities 8 is heat-cured. Subsequently, when the photo-cured layer 6a and a part of the heat-cured layer 3a are removed, e.g., ground off, a substantially bowl-shaped via hole 9 is formed.
    Type: Grant
    Filed: November 16, 1995
    Date of Patent: July 28, 1998
    Assignee: International Business Machines Corporation
    Inventors: Masaharu Shirai, Kenji Terada, Yutaka Tsukada, Shuhei Tsuchita
  • Patent number: 5537740
    Abstract: A blind hole extending from upper or surface wiring of a printed circuit board to inner or lower wiring, and having an opening larger than the bottom, is formed on a substrate, and a conductor pattern is formed on the bottom and the internal wall of the blind hole to connect the inner wiring with the surface wiring.
    Type: Grant
    Filed: November 22, 1995
    Date of Patent: July 23, 1996
    Assignee: International Business Machines Corporation
    Inventors: Masaharu Shirai, Shuhei Tsuchita
  • Patent number: 5510580
    Abstract: A blind hole extending from upper or surface wiring of a printed circuit board to inner or lower wiring, and having an opening larger than the bottom, is formed on a substrate, and a conductor pattern is formed on the bottom and the internal wall of the blind hole to connect the inner wiring with the surface wiring.
    Type: Grant
    Filed: March 30, 1995
    Date of Patent: April 23, 1996
    Assignee: International Business Machines Corporation
    Inventors: Masaharu Shirai, Shuhei Tsuchita
  • Patent number: 5470796
    Abstract: An electronic package assembly wherein lead wires serve to connect conductors on a first substrate (e.g., ceramic) having a semiconductor device (e.g., IC chip) coupled to the conductors and positioned on the substrate, to respective conductors on a second substrate (e.g., a printed circuit board). The lead wires are secured to three different surfaces (e.g., top, side and bottom) of the first substrate, and include curved projection portions for being directly connected to the second substrate conductors.
    Type: Grant
    Filed: April 21, 1995
    Date of Patent: November 28, 1995
    Assignee: International Business Machines Corporation
    Inventors: Yutaka Tsukada, Yasukazu Kobayakawa, Yoji Maeda, Shuhei Tsuchita
  • Patent number: 5444299
    Abstract: An electronic package assembly wherein lead wires serve to connect conductors on a first substrate (e.g., ceramic) having a semiconductor device (e.g., IC chip) coupled to the conductors and positioned on the substrate, to respective conductors on a second substrate (e.g., a printed circuit board). The lead wires are secured to three different surfaces (e.g., top, side and bottom) of the first substrate, and include curved projection portions for being directly connected to the second substrate conductors.
    Type: Grant
    Filed: January 25, 1994
    Date of Patent: August 22, 1995
    Assignee: International Business Machines Corporation
    Inventors: Yutaka Tsukada, Yasukazu Kobayakawa, Yoji Maeda, Shuhei Tsuchita