Abstract: A memory storage apparatus including a connector, a rewritable non-volatile memory module and a memory controller is provided. The memory controller receives a password to be verified, transforms the password into a data stream by using a first unit, generates a cipher text to be verified according to a predetermined data stream and the transformed data stream by using a second unit, and determines whether the cipher text to be verified is the same to a predetermined cipher text stored in the rewritable non-volatile memory module. When the cipher text to be verified is the same to the predetermined cipher text, the memory controller identifies that the password to be verified is validated. Accordingly, the memory storage apparatus can effectively verify a password input by a user, thereby protecting data stored in the rewritable non-volatile memory module.

Abstract: A data storage method for a flash memory storage device is provided. The method includes disposing a pattern identification unit in the flash memory storage device and disposing a pattern analysis unit in a host connected to the flash memory storage device. The method further includes analyzing a usage pattern of each flash memory storage address in the flash memory storage device by using the pattern analysis unit, receiving information from the pattern analysis unit through the pattern identification unit to identify the usage pattern of each flash memory storage address, and storing data into each flash memory storage address through a corresponding process according to the usage pattern of the flash memory storage address. Thereby, data can be stored according to the usage pattern of each flash memory storage address, and accordingly the speed of storing data into the flash memory storage device can be effectively increased.

Abstract: The present invention discloses a data access method accomplished by the following steps of: creating a predetermined password; generating a first encryption key; encrypting data based on the first encryption key; prompting for the predetermined password upon receipt of an access request; decoding a header of the NAND flash memory based on a user-entered password; examining the header to determine whether a mapping between the user-entered password and the first encryption key is defined; and decrypting and outputting the data by a decryption key when the mapping between the user-entered password and the first encryption key is defined.

Abstract: A data storage method for a flash memory storage device is provided. The method includes disposing a pattern identification unit in the flash memory storage device and disposing a pattern analysis unit in a host connected to the flash memory storage device. The method further includes analyzing a usage pattern of each flash memory storage address in the flash memory storage device by using the pattern analysis unit, receiving information from the pattern analysis unit through the pattern identification unit to identify the usage pattern of each flash memory storage address, and storing data into each flash memory storage address through a corresponding process according to the usage pattern of the flash memory storage address. Thereby, data can be stored according to the usage pattern of each flash memory storage address, and accordingly the speed of storing data into the flash memory storage device can be effectively increased.

Abstract: The present invention discloses a data access method accomplished by the following steps of: creating a predetermined password; generating a first encryption key; encrypting data based on the first encryption key; prompting for the predetermined password upon receipt of an access request; decoding a header of the NAND flash memory based on a user-entered password; examining the header to determine whether a mapping between the user-entered password and the first encryption key is defined; and decrypting and outputting the data by a decryption key when the mapping between the user-entered password and the first encryption key is defined.

Abstract: In an amplifier circuit with reduced power-off transients, an amplifier is provided for receiving an input signal and a reference signal to generate an output signal therefrom when it is enabled, and the amplifier is disabled when the supply voltage to the amplifier drops down to a threshold or to a level higher than the reference signal a threshold. The output stage transistor of the amplifier is applied with a body voltage to suppress the body diode parasitic to the output stage transistor to be forward-biased.

Abstract: In an amplifier circuit with reduced power-on transients, an amplifier has a gain to generate an output signal from an input signal and a reference signal when it is enabled, and a control circuit generates a control signal, based on the output signal and the reference signal, to be supplied to the amplifier during a power-on event. The amplifier is enabled by the control signal when the reference signal reaches the level of the output signal.

Abstract: In an amplifier circuit with reduced power-off transients, an amplifier is provided for receiving an input signal and a reference signal to generate an output signal therefrom when it is enabled, and the amplifier is disabled when the supply voltage to the amplifier drops down to a threshold or to a level higher than the reference signal a threshold. The output stage transistor of the amplifier is applied with a body voltage to suppress the body diode parasitic to the output stage transistor to be forward-biased.

Abstract: In an amplifier circuit with reduced power-on transients, an amplifier has a gain to generate an output signal from an input signal and a reference signal when it is enabled, and a control circuit generates a control signal, based on the output signal and the reference signal, to be supplied to the amplifier during a power-on event. The amplifier is enabled by the control signal when the reference signal reaches the level of the output signal.

Abstract: An in-situ purge system for charging the interior of a semiconductor wafer pod with nitrogen gas after the pod is exposed to ambient moisture, air and particles in a clean room. A gas supply line extends into the pod interior from a gas source, and a gas exhaust line extends from the pod interior to remove moisture, particles and excess gas from the pod interior as the pod contains a wafer-filled cassette and rests typically on a SMIF arm before transfer to a processing tool or other destination in the facility. The removable bottom door of the pod and the bottom plate of the cassette are modified to receive the gas supply line and the gas exhaust line.

Abstract: An in-situ purge system for charging the interior of a semiconductor wafer pod with nitrogen gas after the pod is exposed to ambient moisture, air and particles in a clean room. A gas supply line extends into the pod interior from a gas source, and a gas exhaust line extends from the pod interior to remove moisture, particles and excess gas from the pod interior as the pod contains a wafer-filled cassette and rests typically on a SMIF arm before transfer to a processing tool or other destination in the facility. The removable bottom door of the pod and the bottom plate of the cassette are modified to receive the gas supply line and the gas exhaust line.