Abstract: Disclosed are structures and a method to increase the power dissipation of an output pad of an integrated circuit during electrostatic discharge (ESD) by preventing ESD current from flowing through resistive means between that output pad and an internal circuit. By splitting the active region and thereby creating a bipolar transistor which connects directly to the output pad, the resistive means is shunted when the bipolar transistor together with an already existing parasitic bipolar transistor conduct during ESD. Current flow in the resistive means is therefore eliminated and with it damaging power dissipation.

Abstract: Disclosed are structures and a method to increase the power dissipation of an output pad of an integrated circuit during electrostatic discharge (ESD) by preventing ESD current from flowing through resistive means between that output pad and an internal circuit. By splitting the active region and thereby creating a bipolar transistor which connects directly to the output pad, the resistive means is shunted when the bipolar transistor together with an already existing parasitic bipolar transistor conduct during ESD. Current flow in the resistive means is therefore eliminated and with it damaging power dissipation.

Abstract: Disclosed are structures and a method to increase the power dissipation of an output pad of an integrated circuit during electrostatic discharge (ESD) by preventing ESD current from flowing through resistive means between that output pad and an internal circuit. By splitting the active region and thereby creating a bipolar transistor which connects directly to the output pad, the resistive means is shunted when the bipolar transistor together with an already existing parasitic bipolar transistor conduct during ESD. Current flow in the resistive means is therefore eliminated and with it damaging power dissipation.