Patents by Inventor Shuibin NI

Shuibin NI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9337312
    Abstract: The method for manufacturing the TFT includes: forming a semiconductor film, a doped semiconductor film, a source/drain electrode film, and a first patterned photoresist layer sequentially; performing first etching to remove the source/drain electrode film on a region that is not covered by the first patterned photoresist layer; performing second etching to remove the doped semiconductor film and the semiconductor film on a region that is not covered by the first patterned photoresist layer; performing ashing treatment on the photoresist layer to remove the photoresist layer on the channel region; hard-baking the photoresist layer after the ashing treatment; performing third etching to remove the source/drain electrode film on a region that is not covered by the photoresist layer; and performing fourth etching to remove the doped semiconductor film on the region that is not covered by the photoresist layer.
    Type: Grant
    Filed: December 17, 2013
    Date of Patent: May 10, 2016
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Xiaodan Wei, Xiaofeng Yang, Dongkoog Jang, Shuibin Ni
  • Publication number: 20150228760
    Abstract: The method for manufacturing the TFT includes: forming a semiconductor film, a doped semiconductor film, a source/drain electrode film, and a first patterned photoresist layer sequentially; performing first etching to remove the source/drain electrode film on a region that is not covered by the first patterned photoresist layer; performing second etching to remove the doped semiconductor film and the semiconductor film on a region that is not covered by the first patterned photoresist layer; performing ashing treatment on the photoresist layer to remove the photoresist layer on the channel region; hard-baking the photoresist layer after the ashing treatment; performing third etching to remove the source/drain electrode film on a region that is not covered by the photoresist layer; and performing fourth etching to remove the doped semiconductor film on the region that is not covered by the photoresist layer.
    Type: Application
    Filed: December 17, 2013
    Publication date: August 13, 2015
    Applicants: BOE TECHNOLOGY GROUP CO., LTD., CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Xiaodan Wei, Xiaofeng Yang, Dongkoog Jang, Shuibin Ni
  • Publication number: 20140206139
    Abstract: The present invention provides methods for fabricating a thin film transistor and an array substrate, which are applicable in the field of display device fabrication, and solve the problem of performing patterning process too many times during the fabrications of a thin film transistor and an array substrate. The method for fabricating a thin film transistor comprises: forming a gate layer on a substrate; forming a gate insulation layer on the substrate; forming an oxide semiconductor layer and a barrier layer and on the substrate; and forming a source-drain layer on the substrate, wherein, the step of forming the oxide semiconductor layer and the barrier layer comprises: sequentially forming an oxide semiconductor film a the barrier film; and forming the oxide semiconductor layer from the oxide semiconductor film and the barrier layer from the barrier film by performing a patterning process once.
    Type: Application
    Filed: December 13, 2013
    Publication date: July 24, 2014
    Inventors: Shuibin NI, Zhen WANG
  • Patent number: 8633066
    Abstract: A thin film transistor is provided, which comprises at least an active layer, a source electrode and a drain electrode, wherein the source electrode and the drain electrode are located on the active layer and spaced apart from each other; a channel is defined in the active layer between the source electrode and the drain electrode; edges of the active layer are aligned with outer edges of the source electrode and the drain electrode, the outer edge of the source electrode is an edge of the source electrode opposite to the drain electrode, and the outer edge of the drain electrode is an edge of the drain electrode opposite to the source electrode. Also, a method of manufacturing a thin film transistor is provided.
    Type: Grant
    Filed: October 11, 2011
    Date of Patent: January 21, 2014
    Assignees: Boe Technology Group Co., Ltd., Chengdu Boe Optoelectronics Technology Co., Ltd.
    Inventors: Byung Chun Lee, Tai Sung Choi, Shuibin Ni, Pil Seok Kim
  • Publication number: 20120086013
    Abstract: A thin film transistor is provided, which comprises at least an active layer, a source electrode and a drain electrode, wherein the source electrode and the drain electrode are located on the active layer and spaced apart from each other; a channel is defined in the active layer between the source electrode and the drain electrode; edges of the active layer are aligned with outer edges of the source electrode and the drain electrode, the outer edge of the source electrode is an edge of the source electrode opposite to the drain electrode, and the outer edge of the drain electrode is an edge of the drain electrode opposite to the source electrode. Also, a method of manufacturing a thin film transistor is provided.
    Type: Application
    Filed: October 11, 2011
    Publication date: April 12, 2012
    Applicants: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Byung Chun LEE, Tai Sung CHOI, Shuibin NI, Pil Seok KIM