Abstract: A plasma etching method of an embodiment includes etching a silicon-containing film using plasma of a fluorocarbon gas. The fluorocarbon gas contains fluorocarbon which has a composition, regarding carbon and fluorine, represented by a general formula: CxFy, where x and y are numbers satisfying x?12 and x?y, and which includes two benzene rings bonded through a C—C single bond.

Abstract: A plasma etching method of an embodiment includes performing etching on a silicon-containing film by using plasma of a fluorocarbon gas. The fluorocarbon gas used in the plasma etching method has a composition, regarding carbon and fluorine, represented by CxFy, wherein x and y are numbers satisfying x?7 and y?x, and includes a benzene ring structure composed of six carbon atoms.

Abstract: A plasma etching method in an embodiment includes etching a silicon-containing film by using plasma of a hydrofluorocarbon gas. The hydrofluorocarbon gas contains, as a conjugated cyclic compound, hydrofluorocarbon having a composition represented by CxHyFz, where x, y, and z are positive integers satisfying x?6 and (z?y)/x?1).

Abstract: A plasma etching method according to an embodiment is a method for etching a silicon-containing film by using plasma of a fluorocarbon gas. The fluorocarbon gas includes at least one selected from a first fluorocarbon which has a main chain of six or more carbons bonded in a linear manner, the main chain having a structure of single bond and double bond alternately joined, a second fluorocarbon which has a main chain of six or more carbons bonded in a linear manner, the main chain having a structure of single bond and triple bond alternately joined, and a third fluorocarbon which has a main chain of five or more carbons bonded in a linear manner, the main chain having a structure which includes double bond and triple bond.

Abstract: A plasma etching method of an embodiment includes performing etching on a silicon-containing film by using plasma of a fluorocarbon gas. The fluorocarbon gas used in the plasma etching method has a composition, regarding carbon and fluorine, represented by CxFy, wherein x and y are numbers satisfying x?7 and y?x, and includes a benzene ring structure composed of six carbon atoms.

Abstract: A nonvolatile semiconductor memory device includes: a first interconnect; a second interconnect at a position opposing the first interconnect; and a variable resistance layer between the first interconnect and the second interconnect, the variable resistance layer being capable of reversibly changing between a first state and a second state by a voltage applied via the first interconnect and the second interconnect or a current supplied via the first interconnect and the second interconnect, the first state having a first resistivity, the second state having a second resistivity higher than the first resistivity. Wherein the variable resistance layer has a compound of carbon and silicon as a main component and including hydrogen.

Abstract: According to one embodiment, a method is disclosed for manufacturing nonvolatile semiconductor memory device including forming a stacked body by alternately stacking an electrode layer and a layer-to-be-etched, and forming an oxidized layer between the layer-to-be-etched provided at least in any side of an upper side and a lower side of the electrode layer and the electrode layer. The method can include forming a groove which passes through the stacked body. The method can include embedding an insulating body within the groove. The method can include forming a hole which passes through the stacked body. The method can include selectively removing the layer-to-be-etched via the hole. The method can include forming a charge storage layer in an inner side of the hole. The method can include forming a channel body layer in an inner side of the charge storage layer.

Abstract: According to one embodiment, a method is disclosed for manufacturing nonvolatile semiconductor memory device including forming a stacked body by alternately stacking an electrode layer and a layer-to-be-etched, and forming an oxidized layer between the layer-to-be-etched provided at least in any side of an upper side and a lower side of the electrode layer and the electrode layer. The method can include forming a groove which passes through the stacked body. The method can include embedding an insulating body within the groove. The method can include forming a hole which passes through the stacked body. The method can include selectively removing the layer-to-be-etched via the hole. The method can include forming a charge storage layer in an inner side of the hole. The method can include forming a channel body layer in an inner side of the charge storage layer.

Abstract: According to one embodiment, a non-volatile semiconductor memory device includes: a first line; a second line intersecting with the first line; and a memory cell arranged at a position where the second line intersects with the first line, wherein, the memory cell includes: a variable resistance element; and a negative resistance element connected in series to the variable resistance element.

Abstract: A nonvolatile semiconductor memory device includes: a first interconnect; a second interconnect at a position opposing the first interconnect; and a variable resistance layer between the first interconnect and the second interconnect, the variable resistance layer being capable of reversibly changing between a first state and a second state by a voltage applied via the first interconnect and the second interconnect or a current supplied via the first interconnect and the second interconnect, the first state having a first resistivity, the second state having a second resistivity higher than the first resistivity. Wherein the variable resistance layer has a compound of carbon and silicon as a main component and including hydrogen.

Abstract: According to one embodiment, a non-volatile semiconductor memory device includes: a first line; a second line intersecting with the first line; and a memory cell arranged at a position where the second line intersects with the first line, wherein, the memory cell includes: a variable resistance element; and a negative resistance element connected in series to the variable resistance element.