Abstract: A chip varistor formed of a single layer varistor element includes a pair of non-ohmic contact electrodes and a pair of ohmic contact electrodes. The varistor element is a rectangular shape having top and bottom surfaces, two opposite edges and two opposite ends. Each of the non-ohmic contact electrodes covers one of the opposite ends of the varistor element and extends over a majority portion of either one of the top or bottom surfaces. Each of the ohmic contact electrodes is arranged at the center of corresponding one of the top and bottom surfaces of the varistor element. The ohmic contact electrodes directly contact the surfaces of the varistor element to form a ohmic contact relative to the varistor element. Each of the pair of non-ohmic contact electrode is electrically connected to each of the pair of ohmic-contact electrodes while forming a non-ohmic contact with respect to the varistor element.