Patents by Inventor Shuichi TSUBATA
Shuichi TSUBATA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11818898Abstract: A method of manufacturing a magnetoresistive memory device, including forming first and second conductors, a first ferromagnetic layer, an insulating layer, and a second ferromagnetic layer, in order, in a direction away from a substrate. Irradiating, with a first ion beam, the first ferromagnetic layer, the insulating layer, and the second ferromagnetic layer, wherein a third conductor is deposited on a side surface of the second ferromagnetic layer during the irradiation of the first ion beam. Irradiating, with a second ion beam, the second conductor, wherein a first insulator is deposited on a side surface of the insulating layer during the irradiation of the second ion beam; and irradiating, with a third ion beam, the first conductor, wherein a fourth conductor is deposited on a side surface of the second conductor during the irradiation of the third ion beam.Type: GrantFiled: February 25, 2022Date of Patent: November 14, 2023Assignee: Kioxia CorporationInventor: Shuichi Tsubata
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Patent number: 11682441Abstract: According to an embodiment, a magnetoresistive memory device includes a layer stack. The layer stack includes a first ferromagnet, an insulator on the first ferromagnet, and a second ferromagnet on the insulator. A nonmagnet is provided above the layer stack. A first conductor is provided on the nonmagnet. A hard mask is provided above the first conductor. The nonmagnet includes a material that is removed at a first etching rate against a first ion beam. The first conductor includes a material that is removed at a second etching rate against the first ion beam. The first etching rate is lower than the second etching rate.Type: GrantFiled: October 7, 2021Date of Patent: June 20, 2023Assignee: Kioxia CorporationInventor: Shuichi Tsubata
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Patent number: 11581485Abstract: A semiconductor memory device includes a first interconnect, a second interconnect, a first storage layer, and a first insulating film. The first insulating film is provided along a surface of a part of the second interconnect and a surface of the first storage layer. The first insulating film is composed of Si, N, and O. The atomic ratio (N/O) between N and O in the first insulating film is not less than 1.0 at a first position which is the position of the second interconnect-side end surface of the first storage layer in a third direction. The atomic ratio (N/O) between N and O in the first insulating film is less than 1.0 at a second position which is the position of the end surface of the second interconnect, opposite to the first storage layer-side end surface, in the third direction.Type: GrantFiled: August 30, 2021Date of Patent: February 14, 2023Assignee: KIOXIA CORPORATIONInventors: Kotaro Noda, Kyoko Noda, Ken Hoshino, Shuichi Tsubata
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Patent number: 11475931Abstract: According to one embodiment, a magnetoresistive memory device includes: a first conductor; a layer stack; an insulator on a side surface of the layer stack; a second conductor on a second surface of the layer stack; a third conductor; and a fourth conductor on the third conductor. The layer stack includes a first ferromagnetic layer, a second ferromagnetic layer, and an insulating layer between the first ferromagnetic layer and the second ferromagnetic layer and has a first surface in contact with the first conductor. The second surface is at an opposite side of the first surface. The third conductor has a portion on the second conductor and a portion on a side surface of the insulator.Type: GrantFiled: September 9, 2020Date of Patent: October 18, 2022Assignee: KIOXIA CORPORATIONInventors: Shuichi Tsubata, Naoki Akiyama
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Publication number: 20220302378Abstract: A semiconductor memory device includes a first interconnect, a second interconnect, a first storage layer, and a first insulating film. The first insulating film is provided along a surface of a part of the second interconnect and a surface of the first storage layer. The first insulating film is composed of Si, N, and O. The atomic ratio (N/O) between N and O in the first insulating film is not less than 1.0 at a first position which is the position of the second interconnect-side end surface of the first storage layer in a third direction. The atomic ratio (N/O) between N and O in the first insulating film is less than 1.0 at a second position which is the position of the end surface of the second interconnect, opposite to the first storage layer-side end surface, in the third direction.Type: ApplicationFiled: August 30, 2021Publication date: September 22, 2022Applicant: Kioxia CorporationInventors: Kotaro NODA, Kyoko NODA, Ken HOSHINO, Shuichi TSUBATA
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Publication number: 20220181386Abstract: A method of manufacturing a magnetoresistive memory device, including forming first and second conductors, a first ferromagnetic layer, an insulating layer, and a second ferromagnetic layer, in order, in a direction away from a substrate. Irradiating, with a first ion beam, the first ferromagnetic layer, the insulating layer, and the second ferromagnetic layer, wherein a third conductor is deposited on a side surface of the second ferromagnetic layer during the irradiation of the first ion beam. Irradiating, with a second ion beam, the second conductor, wherein a first insulator is deposited on a side surface of the insulating layer during the irradiation of the second ion beam; and irradiating, with a third ion beam, the first conductor, wherein a fourth conductor is deposited on a side surface of the second conductor during the irradiation of the third ion beam.Type: ApplicationFiled: February 25, 2022Publication date: June 9, 2022Applicant: Kioxia CorporationInventor: Shuichi TSUBATA
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Patent number: 11296146Abstract: According to an embodiment, a magnetoresistive memory device includes a first conductor with a first surface. A first structure on the first surface of the first conductor includes a first ferromagnetic layer. An insulating layer is on the first structure. A second structure on the insulating layer includes a second ferromagnetic layer. A second conductor is in contact with the first surface of the first conductor and a side surface of the first structure. A first insulator on the second conductor covers a side surface of the insulating layer, and is in contact with the side surface of the first structure and a side surface of the second structure. A third conductor on the first insulator is in contact with the side surface of the second structure.Type: GrantFiled: March 12, 2020Date of Patent: April 5, 2022Assignee: KIOXIA CORPORATIONInventor: Shuichi Tsubata
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Publication number: 20220028441Abstract: According to an embodiment, a magnetoresistive memory device includes a layer stack. The layer stack includes a first ferromagnet, an insulator on the first ferromagnet, and a second ferromagnet on the insulator. A nonmagnet is provided above the layer stack. A first conductor is provided on the nonmagnet. A hard mask is provided above the first conductor. The nonmagnet includes a material that is removed at a first etching rate against a first ion beam. The first conductor includes a material that is removed at a second etching rate against the first ion beam. The first etching rate is lower than the second etching rate.Type: ApplicationFiled: October 7, 2021Publication date: January 27, 2022Applicant: TOSHIBA MEMORY CORPORATIONInventor: Shuichi TSUBATA
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Publication number: 20210287727Abstract: According to one embodiment, a magnetoresistive memory device includes: a first conductor; a layer stack; an insulator on a side surface of the layer stack; a second conductor on a second surface of the layer stack; a third conductor; and a fourth conductor on the third conductor. The layer stack includes a first ferromagnetic layer, a second ferromagnetic layer, and an insulating layer between the first ferromagnetic layer and the second ferromagnetic layer and has a first surface in contact with the first conductor. The second surface is at an opposite side of the first surface. The third conductor has a portion on the second conductor and a portion on a side surface of the insulator.Type: ApplicationFiled: September 9, 2020Publication date: September 16, 2021Applicant: Kioxia CorporationInventors: Shuichi TSUBATA, Naoki AKIYAMA
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Publication number: 20210074762Abstract: According to an embodiment, a magnetoresistive memory device includes a first conductor with a first surface. A first structure on the first surface of the first conductor includes a first ferromagnetic layer. An insulating layer is on the first structure. A second structure on the insulating layer includes a second ferromagnetic layer. A second conductor is in contact with the first surface of the first conductor and a side surface of the first structure. A first insulator on the second conductor covers a side surface of the insulating layer, and is in contact with the side surface of the first structure and a side surface of the second structure. A third conductor on the first insulator is in contact with the side surface of the second structure.Type: ApplicationFiled: March 12, 2020Publication date: March 11, 2021Applicant: KIOXIA CORPORATIONInventor: Shuichi TSUBATA
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Patent number: 10847576Abstract: According to one embodiment, a magnetic memory device includes a stacked structure including a magnetic layer, a first insulating layer covering the stacked structure and including a protrusion based on the stacked structure, a second insulating layer provided on the first insulating layer, and an electrode connected to the stacked structure. The first insulating layer has a first hole passing through the first insulating layer, the electrode is connected to the stacked structure at least through the first hole, the second insulating layer has a second hole inside of which a part of the electrode and the protrusion are provided, and the second hole includes a part whose area increases toward the stacked structure.Type: GrantFiled: March 14, 2019Date of Patent: November 24, 2020Assignee: TOSHIBA MEMORY CORPORATIONInventors: Shuichi Tsubata, Yasuyuki Sonoda, Kazuhiro Tomioka, Takao Ochiai
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Publication number: 20200294566Abstract: According to an embodiment, a magnetoresistive memory device includes a layer stack. The layer stack includes a first ferromagnet, an insulator on the first ferromagnet, and a second ferromagnet on the insulator. A nonmagnet is provided above the layer stack. A first conductor is provided on the nonmagnet. A hard mask is provided above the first conductor. The nonmagnet includes a material that is removed at a first etching rate against a first ion beam. The first conductor includes a material that is removed at a second etching rate against the first ion beam. The first etching rate is lower than the second etching rate.Type: ApplicationFiled: September 9, 2019Publication date: September 17, 2020Applicant: TOSHIBA MEMORY CORPORATIONInventor: Shuichi TSUBATA
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Publication number: 20200083290Abstract: According to one embodiment, a magnetic memory device includes a stacked structure including a magnetic layer, a first insulating layer covering the stacked structure and including a protrusion based on the stacked structure, a second insulating layer provided on the first insulating layer, and an electrode connected to the stacked structure. The first insulating layer has a first hole passing through the first insulating layer, the electrode is connected to the stacked structure at least through the first hole, the second insulating layer has a second hole inside of which a part of the electrode and the protrusion are provided, and the second hole includes a part whose area increases toward the stacked structure.Type: ApplicationFiled: March 14, 2019Publication date: March 12, 2020Applicant: TOSHIBA MEMORY CORPORATIONInventors: Shuichi TSUBATA, Yasuyuki SONODA, Kazuhiro TOMIOKA, Takao OCHIAI
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Patent number: 10490732Abstract: According to one embodiment, a magnetic memory device includes a stacked structure including a first magnetic layer, a second magnetic layer and a nonmagnetic layer between the first magnetic layer and the second magnetic layer, and a sidewall insulating layer provided on a side surface of the stacked structure and containing boron (B).Type: GrantFiled: September 16, 2016Date of Patent: November 26, 2019Assignee: TOSHIBA MEMORY CORPORATIONInventors: Yasuyuki Sonoda, Daisuke Watanabe, Masatoshi Yoshikawa, Youngmin Eeh, Shuichi Tsubata, Toshihiko Nagase, Yutaka Hashimoto, Kazuya Sawada, Kazuhiro Tomioka, Kenichi Yoshino, Tadaaki Oikawa
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Patent number: 10461245Abstract: According to one embodiment, a method of manufacturing a magnetic memory device, includes forming a stack film including a magnetic layer on an underlying area, forming a hard mask on the stack film, forming a stack structure by etching the stack film using the hard mask as a mask, forming a first protective insulating film on a side surface of the stack structure, and performing an oxidation treatment.Type: GrantFiled: March 3, 2015Date of Patent: October 29, 2019Assignee: TOSHIBA MEMORY CORPORATIONInventors: Shuichi Tsubata, Masatoshi Yoshikawa, Satoshi Seto, Kazuhiro Tomioka
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Patent number: 10388854Abstract: According to one embodiment, a magnetic memory device includes a stacked structure, the stacked structure including a first magnetic layer having a variable magnetization direction, a second magnetic layer having a fixed magnetization direction and a nonmagnetic layer provided between the first magnetic layer and the second magnetic layer, wherein the nonmagnetic layer comprises a structure in which a first oxide layer formed of a first metal oxide and a second oxide layer formed of a second metal oxide having a relative dielectric constant greater than a relative dielectric constant of the first metal oxide are stacked.Type: GrantFiled: March 12, 2018Date of Patent: August 20, 2019Assignee: TOSHIBA MEMORY CORPORATIONInventors: Masatoshi Yoshikawa, Shuichi Tsubata
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Patent number: 10388855Abstract: According to one embodiment, a magnetic memory device includes a stacked structure including a first magnetic layer having a variable magnetization direction, a nonmagnetic layer provided on the first magnetic layer, and a second magnetic layer provided on the nonmagnetic layer and having a fixed magnetization direction, wherein as viewed in a direction parallel to a stacked direction of the stacked structure, a pattern of a lower surface of the first magnetic layer is located inside a pattern of an upper surface of the first magnetic layer, and a pattern of an upper surface of the second magnetic layer is located inside a pattern of a lower surface of the second magnetic layer or substantially conforms to the pattern of the lower surface of the second magnetic layer.Type: GrantFiled: August 30, 2017Date of Patent: August 20, 2019Assignee: TOSHIBA MEMORY CORPORATIONInventors: Shuichi Tsubata, Masatoshi Yoshikawa, Kenji Noma
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Publication number: 20190088856Abstract: According to one embodiment, a magnetic memory device includes a stacked structure, the stacked structure including a first magnetic layer having a variable magnetization direction, a second magnetic layer having a fixed magnetization direction and a nonmagnetic layer provided between the first magnetic layer and the second magnetic layer, wherein the nonmagnetic layer comprises a structure in which a first oxide layer formed of a first metal oxide and a second oxide layer formed of a second metal oxide having a relative dielectric constant greater than a relative dielectric constant of the first metal oxide are stacked.Type: ApplicationFiled: March 12, 2018Publication date: March 21, 2019Applicant: TOSHIBA MEMORY CORPORATIONInventors: Masatoshi YOSHIKAWA, Shuichi TSUBATA
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Patent number: 10230042Abstract: A magnetoresistive effect element according to one embodiment includes: a first magnetic layer; a nonmagnetic layer; a second magnetic layer; a metal layer; and a third magnetic layer. An area of a bottom of the third magnetic layer is larger than an area of a top of the third magnetic layer. An angle between the top of the third magnetic layer and a side of the third magnetic layer is larger than an angle between a top of the second magnetic layer and a side of the second magnetic layer, or an angle between the bottom of the third magnetic layer and a side of the third magnetic layer is smaller than an angle between the bottom of the second magnetic layer and a side of the second magnetic layer.Type: GrantFiled: September 9, 2016Date of Patent: March 12, 2019Assignee: TOSHIBA MEMORY CORPORATIONInventors: Masatoshi Yoshikawa, Hisanori Aikawa, Kazuhiro Tomioka, Shuichi Tsubata, Masaru Toko, Katsuya Nishiyama, Yutaka Hashimoto, Tatsuya Kishi
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Patent number: 10193057Abstract: A magnetic memory device includes a stacked structure including a magnetic element, a protective insulating film covering the stacked structure, and an interface layer provided at an interface between the stacked structure and the protective insulating film. The interface layer contains a predetermined element which is not contained in the magnetic element or the protective insulating film.Type: GrantFiled: January 6, 2017Date of Patent: January 29, 2019Assignee: TOSHIBA MEMORY CORPORATIONInventors: Masatoshi Yoshikawa, Hiroaki Yoda, Shuichi Tsubata, Kenji Noma, Tatsuya Kishi, Satoshi Seto, Kazuhiro Tomioka