Patents by Inventor Shuichi Yamano

Shuichi Yamano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4924479
    Abstract: A communication control system arranged between a plurality of terminal apparatuses and a host processing unit in order to transmit and receive signals based on an NRZI coding system between them by way of a half duplex communication system, a "0" bit detecting circuit for detecting the "0" bit of a one-bit length is provided in the communication control system and the sending and receiving modes are automatically switched in accordance with the output of this detecting circuit.
    Type: Grant
    Filed: August 10, 1987
    Date of Patent: May 8, 1990
    Assignee: Hitachi, Ltd.
    Inventors: Hideki Iwao, Michio Kato, Shuichi Yamano