Abstract: The present utility model relates to an ultra-low voltage two-stage ring voltage-controlled oscillator applied to a chip circuit. The oscillator includes two-stage delay units. The oscillator includes two delay units that are connected end-to-end, and adjusts a working frequency by adjusting delay time of the delay unit. The delay unit includes PMOS transistors M1, M2, M3, and M4, NMOS transistors M5, M6, M7, and M8, and a load capacitor CL. The two-stage ring voltage-controlled oscillator of the present utility model uses a substrate feed forward bias structure, reduces a threshold voltage of a transistor, reduces a supply voltage, reduces power consumption, has a large tuning range, and is particularly suitable for a system that works at a low supply voltage.

Abstract: The present invention relates to a linear voltage regulator for a low-power digital circuit of a chip, comprising a reference voltage varying with a threshold voltage, a buffer formed by amplifiers, and a compensation capacitor. The reference voltage is used as an input end of the buffer, an output voltage of the buffer, having a current driving capability, is kept consistent with the reference voltage, and the compensation capacitor is configured to decrease the fluctuation range of the output voltage when a current load varies. The reference voltage comprises two gate-source voltages of an MOS operating in a sub-threshold region, and the reference voltage Vref satisfies the following relation: Vref??(|VGS1|+VGS2); the reference voltage Vref flows through the output buffer formed by the amplifiers to supply a voltage to a digital circuit.

Abstract: The present utility model relates to an ultra-low voltage two-stage ring voltage-controlled oscillator applied to a chip circuit. The oscillator includes two-stage delay units. The oscillator includes two delay units that are connected end-to-end, and adjusts a working frequency by adjusting delay time of the delay unit. The delay unit includes PMOS transistors M1, M2, M3, and M4, NMOS transistors M5, M6, M7, and M8, and a load capacitor CL. The two-stage ring voltage-controlled oscillator of the present utility model uses a substrate feed forward bias structure, reduces a threshold voltage of a transistor, reduces a supply voltage, reduces power consumption, has a large tuning range, and is particularly suitable for a system that works at a low supply voltage.

Abstract: The present invention relates to a linear voltage regulator for a low-power digital circuit of a chip, comprising a reference voltage varying with a threshold voltage, a buffer formed by amplifiers, and a compensation capacitor. The reference voltage is used as an input end of the buffer, an output voltage of the buffer, having a current driving capability, is kept consistent with the reference voltage, and the compensation capacitor is configured to decrease the fluctuation range of the output voltage when a current load varies. The reference voltage comprises two gate-source voltages of an MOS operating in a sub-threshold region, and the reference voltage Vref satisfies the following relation: Vref ? ?(|VGS1|+VGS2); the reference voltage Vref flows through the output buffer formed by the amplifiers to supply a voltage to a digital circuit.