Patents by Inventor Shuiwang Liu

Shuiwang Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11347679
    Abstract: Systems and methods for a hybrid system-on-chip usable for predicting performance and power requirements of a host server include a big cores module, including central processing units, for receiving and pre-processing performance and power metrics data of the host server and to allocate computing resources, a small cores module, including massively parallel processing units, for mapping each instance associated with host server in the performance and power metrics data to a corresponding massively parallel processing unit based on the allocated computing resources for a per-instance metrics calculation, and an artificial intelligence (AI) accelerator for calculating performance and power prediction results based on the per-instance calculations from the small cores module.
    Type: Grant
    Filed: February 8, 2018
    Date of Patent: May 31, 2022
    Assignee: Alibaba Group Holding Limited
    Inventors: Jun Song, Yi Liu, Lingling Jin, Guan Wang, Ying Wang, Hong Tang, Nan Zhang, Zhengxiong Tian, Yu Zhou, Chao Qian, Shuiwang Liu, Jun Ruan, Bo Yang, Lin Yu, Jiangwei Huang, Hong Zhou, Yijun Lu, Ling Xu, Shiwei Li, Xiaolin Meng
  • Publication number: 20200401093
    Abstract: Systems and methods for a hybrid system-on-chip usable for predicting performance and power requirements of a host server include a big cores module, including central processing units, for receiving and pre-processing performance and power metrics data of the host server and to allocate computing resources, a small cores module, including massively parallel processing units, for mapping each instance associated with host server in the performance and power metrics data to a corresponding massively parallel processing unit based on the allocated computing resources for a per-instance metrics calculation, and an artificial intelligence (AI) accelerator for calculating performance and power prediction results based on the per-instant calculations from the small cores module.
    Type: Application
    Filed: February 8, 2018
    Publication date: December 24, 2020
    Inventors: Jun Song, Yi Liu, Lingling Jin, Guan Wang, Ying Wang, Hong Tang, Nan Zhang, Zhengxiong Tian, Yu Zhou, Chao Qian, Shuiwang Liu, Jun Ruan, Bo Yang, Lin Yu, Jiangwei Huang, Hong Zhou, Yijun Lu, Shao Xu, Shiwei Li, Xiaoli Meng
  • Patent number: 6943688
    Abstract: An antenna arrangement comprises at least two antenna loops disposed and overlapping in a plane to define a detection region adjacent thereto in which the antenna loops transmit and/or receive electromagnetic signals and through which a wireless article may pass. The antenna arrangement may be coupled to a processor and/or utilization system for performing a desired function.
    Type: Grant
    Filed: February 23, 2004
    Date of Patent: September 13, 2005
    Assignee: Amerasia International Technology, Inc.
    Inventors: Kevin Kwong-Tai Chung, Shuiwang Liu
  • Publication number: 20040164864
    Abstract: An antenna arrangement comprises at least two antenna loops disposed and overlapping in a plane to define a detection region adjacent thereto in which the antenna loops transmit and/or receive electromagnetic signals and through which a wireless article may pass. The antenna arrangement may be coupled to a processor and/or utilization system for performing a desired function.
    Type: Application
    Filed: February 23, 2004
    Publication date: August 26, 2004
    Inventors: Kevin Kwong-Tai Chung, Shuiwang Liu
  • Patent number: 6703935
    Abstract: An antenna arrangement comprises at least two antenna loops disposed in two intersecting planes disposed at an angle to define a detection region in which the antenna loops transmit and/or receive electromagnetic signals and through which an object may pass. Each antenna loop includes a portion disposed in each of the two planes, and the antenna loops overlap at least in part in each of the two planes. The antenna arrangement may be coupled to a processor and/or utilization system for cooperating therewith for performing a desired function.
    Type: Grant
    Filed: September 19, 2002
    Date of Patent: March 9, 2004
    Assignee: Amerasia International Technology, Inc.
    Inventors: Kevin Kwong-Tai Chung, Shuiwang Liu