Abstract: Methods for bidirectional communication and bidirectional communication buffers are described. In one embodiment, a method for bidirectional communication using first and second communication buses, which have opposite directions of data transmission, is described. The method for bidirectional communication involves detecting a signal from a first communication bus and buffering the detected signal and transmitting the buffered signal through a second communication bus while blocking data transmission from the second communication bus. Other embodiments are also described.

Abstract: A low drop-out voltage regulator includes an error amplifier having a non-inverting input, an inverting input and an output. One of the non-inverting and inverting inputs is connected to a reference voltage. An output circuit is connected by way of the output of the error amplifier to an external load. The output circuit generates an output current and an output voltage for the external load. A current tracking circuit is coupled to the output circuit and receives the output current and generates a tracking current that tracks the output current. A load tracking-compensation circuit is coupled to the current tracking circuit and the output circuit, and generates a control voltage based on the tracking current and provides the control voltage to the output circuit.

Abstract: A low drop-out voltage regulator includes an error amplifier having a non-inverting input, an inverting input and an output. One of the non-inverting and inverting inputs is connected to a reference voltage. An output circuit is connected by way of the output of the error amplifier to an external load. The output circuit generates an output current and an output voltage for the external load. A current tracking circuit is coupled to the output circuit and receives the output current and generates a tracking current that tracks the output current. A load tracking-compensation circuit is coupled to the current tracking circuit and the output circuit, and generates a control voltage based on the tracking current and provides the control voltage to the output circuit.

Abstract: Methods for bidirectional communication and bidirectional communication buffers are described. In one embodiment, a method for bidirectional communication using first and second communication buses, which have opposite directions of data transmission, is described. The method for bidirectional communication involves detecting a signal from a first communication bus and buffering the detected signal and transmitting the buffered signal through a second communication bus while blocking data transmission from the second communication bus. Other embodiments are also described.

Abstract: An oscillator circuit includes an amplifier including at least two terminals for receiving a crystal and an automatic amplitude control loop coupled to the amplifier including biasing circuitry switched between a first operational mode and a second operational mode. The first operational mode occurs during an initial time period and the second operational mode occurs after the initial time period is expired. The biasing circuitry includes first and second PMOS transistor circuits, each transistor circuit including an unswitched PMOS transistor and a switched PMOS transistor. Alternatively, the biasing circuitry can include first and second NMOS transistor circuits, each transistor circuit including an unswitched NMOS transistor and a switched NMOS transistor. The biasing circuitry is under control of an internally generated control signal.

Abstract: An oscillator circuit includes an amplifier including at least two terminals for receiving a crystal and an automatic amplitude control loop coupled to the amplifier including biasing circuitry switched between a first operational mode and a second operational mode. The first operational mode occurs during an initial time period and the second operational mode occurs after the initial time period is expired. The biasing circuitry includes first and second PMOS transistor circuits, each transistor circuit including an unswitched PMOS transistor and a switched PMOS transistor. Alternatively, the biasing circuitry can include first and second NMOS transistor circuits, each transistor circuit including an unswitched NMOS transistor and a switched NMOS transistor. The biasing circuitry is under control of an internally generated control signal.