Abstract: An electronic device including a plurality of sensing pixel circuits is provided. At least one of the sensing pixel circuits includes a photoelectric sensing element, a first transistor device, a second transistor device, a third transistor device and a fourth transistor device. The fourth transistor device includes a first end, a second end and a control end. The first end of the fourth transistor device is coupled to a first end of the first transistor device. The second end of the fourth transistor device is coupled to a bias voltage. The control end of the fourth transistor device is coupled to a scan line. The fourth transistor device serves as a current sink in a pre-trap period.

Abstract: A sensing device provided herein includes a first pixel circuit, a readout circuit, a first switch, a second switch, and a first capacitor. The readout circuit is electrically connected to the first pixel circuit. The first switch is electrically connected between the first pixel circuit and the readout circuit. The second switch is electrically connected between the first switch and the readout circuit. The first capacitor includes a first electrode electrically connected to the first switch and the second switch.

Abstract: An electronic device and a control method are provided. The electronic device includes a sensing pixel. The sensing pixel includes a photosensitive element, a first transistor, a second transistor and a third transistor. The first transistor is coupled to the photosensitive element and for receiving a reset signal. The second transistor is coupled to the photosensitive element. The third transistor is coupled to the second transistor and for receiving a scan signal. During a reset period, a reset signal waveform of the reset signal and a first scan signal waveform of the scan signal are at least partially overlapped.

Abstract: An electronic device and a control method are provided. The electronic device includes a sensing pixel. The sensing pixel includes a photosensitive element, a first transistor, a second transistor and a third transistor. The first transistor is coupled to the photosensitive element and for receiving a reset signal. The second transistor is coupled to the photosensitive element. The third transistor is coupled to the second transistor and for receiving a scan signal. During a reset period, a reset signal waveform of the reset signal and a first scan signal waveform of the scan signal are at least partially overlapped.

Abstract: An electronic device is provided. The electronic device includes: a substrate, a plurality of pixels, a plurality of data lines, an amplifier and a current source. The pixels and data lines are disposed on the substrate. The amplifier and the current source are coupled to one of the data lines, wherein at least a portion of the one of data lines forms a conduction path. One of the pixels is coupled to the one of the data lines at a first node, and the first node is on the first conduction path. A first current that flows from the first node to the first source terminal is different from a second current that flows from the first node to the first output terminal.

Abstract: A display panel comprises a display area, a plurality of scan lines and data lines, a data driving circuit and a demultiplexing unit. The scan lines and the data lines cross each other within the display area. At least two of the data lines have different capacitances. The data driving circuit outputs a plurality of control signal and a data signal. The demultiplexing unit includes a plurality of thin-film transistors coupled with the data driving circuit and the data lines. The thin-film transistors receive the data signal and transmit the data signal to the correspondingly coupled data lines through channel layers of the thin-film transistors according to the control signals. The channel layers of at least two of the thin-film transistors coupled with the at least two data lines have different widths.

Abstract: A display panel comprises a display area, a plurality of scan lines and data lines, a data driving circuit and a demultiplexing unit. The scan lines and the data lines cross each other within the display area. At least two of the data lines have different capacitances. The data driving circuit outputs a plurality of control signal and a data signal. The demultiplexing unit includes a plurality of thin-film transistors coupled with the data driving circuit and the data lines. The thin-film transistors receive the data signal and transmit the data signal to the correspondingly coupled data lines through channel layers of the thin-film transistors according to the control signals. The channel layers of at least two of the thin-film transistors coupled with the at least two data lines have different widths.

Abstract: A display panel comprises a display area, a plurality of scan lines and data lines, a data driving circuit and a demultiplexing unit. The scan lines and the data lines cross each other within the display area. At least two of the data lines have different capacitances. The data driving circuit outputs a plurality of control signal and a data signal. The demultiplexing unit includes a plurality of thin-film transistors coupled with the data driving circuit and the data lines. The thin-film transistors receive the data signal and transmit the data signal to the correspondingly coupled data lines through channel layers of the thin-film transistors according to the control signals. The channel layers of at least two of the thin-film transistors coupled with the at least two data lines have different widths.

Abstract: A display panel comprises a display area, a plurality of scan lines and data lines, a data driving circuit and a demultiplexing unit. The scan lines and the data lines cross each other within the display area. At least two of the data lines have different capacitances. The data driving circuit outputs a plurality of control signal and a data signal. The demultiplexing unit includes a plurality of thin-film transistors coupled with the data driving circuit and the data lines. The thin-film transistors receive the data signal and transmit the data signal to the correspondingly coupled data lines through channel layers of the thin-film transistors according to the control signals. The channel layers of at least two of the thin-film transistors coupled with the at least two data lines have different widths.

Abstract: The invention aims at providing a matrix addressing method and circuitry and display device, which enable power savings without as little degrading the legibility of content of an image as possible. A matrix addressing method for driving pixels arranged over a display area by signals supplied to row electrodes and column electrodes arranged to cross one another.

Abstract: A liquid crystal display (LCD) panel includes a first substrate, a second substrate, a common electrode driving circuit and a reverse gain circuit. A storage capacitor electrode is disposed on the first substrate. A common electrode is disposed on the second substrate which is disposed oppositely to the first substrate. The common electrode driving circuit is electrically connected with the common electrode and outputs a common voltage level signal to the common electrode. The reverse gain circuit is electrically connected to the storage capacitor electrode through a connecting terminal and outputs a reverse gain voltage signal to the common electrode according to a voltage signal of the storage capacitor electrode.

Abstract: The invention aims at preventing an occurrence of artefacts while reducing power consumption. A matrix addressing method for alternately driving pixels. The frame period of the images is formed by successively sequencing on a time series a plurality of block periods, the block periods each being composed of a first half block being a period for successively sequencing on a time series application timings of the pixel voltages for one or more row electrodes to be provided with one polarity, the second half block being a period for successively sequencing on a time series application timings of the pixel voltages for one or more row electrodes to be provided with the other polarity. Ones of even-numbered row electrodes and odd-numbered row electrodes in arrangement order on the display screen are selected in the first half block. The others spatially adjoining the ones are selected in the second half block.

Abstract: A liquid crystal display (LCD) panel includes a first substrate, a second substrate, a common electrode driving circuit and a reverse gain circuit. A storage capacitor electrode is disposed on the first substrate. A common electrode is disposed on the second substrate which is disposed oppositely to the first substrate. The common electrode driving circuit is electrically connected with the common electrode and outputs a common voltage level signal to the common electrode. The reverse gain circuit is electrically connected to the storage capacitor electrode through a connecting terminal and outputs a reverse gain voltage signal to the common electrode according to a voltage signal of the storage capacitor electrode.

Abstract: The invention aims at providing a matrix addressing method and circuitry and display device, which enable power savings without as little degrading the legibility of content of an image as possible. A matrix addressing method for driving pixels arranged over a display area by signals supplied to row electrodes and column electrodes arranged to cross one another.

Abstract: An image display device having a voltage supplying device generating a first changing voltage for setting a transistor to an on-state and a second changing voltage for setting a transistor to an off-state to operate so as to establish a first supply mode, a second supply mode and a third supply mode to a plurality of gate buses for determining the corrected common electrode voltage.

Abstract: The invention aims at preventing an occurrence of artefacts while reducing power consumption. A matrix addressing method for alternately driving pixels. The frame period of the images is formed by successively sequencing on a time series a plurality of block periods, the block periods each being composed of a first half block being a period for successively sequencing on a time series application timings of the pixel voltages for one or more row electrodes to be provided with one polarity, the second half block being a period for successively sequencing on a time series application timings of the pixel voltages for one or more row electrodes to be provided with the other polarity. Ones of even-numbered row electrodes and odd-numbered row electrodes in arrangement order on the display screen are selected in the first half block. The others spatially adjoining the ones are selected in the second half block.

Abstract: The present invention provides a driving circuit capable of reducing power consumption in an amplifier for outputting a target voltage. A driving circuit for driving a capacitive load Ccol of a display device, comprising: driving signal supplying means (10) for supplying a driving signal Vin having a target voltage to be applied; an amplifying stage (20) for receiving the driving signal Vin and selectively outputting the driving signal Vin to the capacitive load Ccol; and a pair of current sources Ipcp, Ipcn for selectively supplying a positive current and a negative current to the capacitive load Ccol, respectively during their on-states. The driving circuit repeats a repetitive operation including a pre-operation where any one of the current sources Ipcp, Ipcn is switched ON in accordance with the driving signal Vin and then switched OFF and a post-operation where the amplifying stage (20) is switched to a state for outputting the driving signal Vin to the capacitive load Ccol after the pre-operation.

Abstract: An object of the invention is to provide the miniaturized gray scale voltage outputting device.

Abstract: Column electrode driving circuit for a display device which reduces power consumption arid is capable of gray-scale displaying. The driving circuit include a gray-scale voltage producing system including amplifiers whose inputs are applied with a plurality of gray-scale voltages, respectively, and a selecting system for selecting and outputting any of output signals of the amplifiers for each pixel or each predetermined displayed unit in accordance with an image signal indicative of a gray-scale level for the pixel or displayed unit. The gray-scale voltage producing system causes any amplifiers of the amplifiers, which correspond to a predetermined number of predetermined gray scale levels, to be powered off and causing the other amplifiers to be powered on during a predetermined mode, the selecting system select any of output signals of the amplifiers powered on during the predetermined mode. A further construction based on potential divider circuits is also disclosed.

Abstract: An object of the invention is to provide a image display device in which the component cost and the equipment cost are reduced and a voltage level of a common electrode is easily adjustable to an optimum level.