Patents by Inventor Shuji Kamata

Shuji Kamata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11527661
    Abstract: A semiconductor device includes a first electrode, a second electrode, a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type; a third semiconductor layer of the first conductivity type; a first active region; and a third electrode. The first semiconductor layer is located between the first electrode and the second electrode. The second semiconductor layer is located above the first semiconductor layer. The first active region is next to the second semiconductor layer in a second direction. The first active region includes a first upper portion and a first upper portion. An average value of a width in the second direction of the first lower portion is greater than an average value of a width in the second direction of the first upper portion. The third semiconductor layer is electrically connected with the second electrode.
    Type: Grant
    Filed: July 15, 2021
    Date of Patent: December 13, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Hiroyuki Irifune, Hiroshi Kono, Makoto Mizukami, Shuji Kamata
  • Publication number: 20220093805
    Abstract: A semiconductor device includes a first electrode, a second electrode, a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type; a third semiconductor layer of the first conductivity type; a first active region; and a third electrode. The first semiconductor layer is located between the first electrode and the second electrode. The second semiconductor layer is located above the first semiconductor layer. The first active region is next to the second semiconductor layer in a second direction. The first active region includes a first upper portion and a first upper portion. An average value of a width in the second direction of the first lower portion is greater than an average value of a width in the second direction of the first upper portion. The third semiconductor layer is electrically connected with the second electrode.
    Type: Application
    Filed: July 15, 2021
    Publication date: March 24, 2022
    Inventors: Hiroyuki IRIFUNE, Hiroshi KONO, Makoto MIZUKAMI, Shuji KAMATA
  • Patent number: 11034354
    Abstract: A start control device is a start control device that controls start of a vehicle including a clutch that is engaged by the hydraulic pressure supplied from a hydraulic pressure supply source and a start device that starts a vehicle driving source, and includes: a hydraulic pressure control unit that controls so that the hydraulic pressure supply source supplies the hydraulic pressure to the clutch if a start condition for the vehicle is satisfied; and a start device control unit that controls the start device so that the rotation speed of the vehicle driving source reaches the predetermined rotation speed after the clutch is engaged.
    Type: Grant
    Filed: September 23, 2019
    Date of Patent: June 15, 2021
    Assignee: Honda Motor Co., Ltd.
    Inventors: Masaya Agata, Shuji Kamata
  • Publication number: 20200094841
    Abstract: A start control device is a start control device that controls start of a vehicle including a clutch that is engaged by the hydraulic pressure supplied from a hydraulic pressure supply source and a start device that starts a vehicle driving source, and includes: a hydraulic pressure control unit that controls so that the hydraulic pressure supply source supplies the hydraulic pressure to the clutch if a start condition for the vehicle is satisfied; and a start device control unit that controls the start device so that the rotation speed of the vehicle driving source reaches the predetermined rotation speed after the clutch is engaged.
    Type: Application
    Filed: September 23, 2019
    Publication date: March 26, 2020
    Inventors: Masaya AGATA, Shuji KAMATA
  • Patent number: 10211118
    Abstract: A semiconductor module includes a metal substrate having a mounting surface, a first conductive plate on the mounting surface, an insulating substrate on the first conductive plate, a second conductive plate on the insulating substrate, a conductive pad on the insulating substrate, a semiconductor element on the second conductive plate, a circuit board electrically connected to the conductive pad, a resin case connected to the metal substrate and extending along at least a portion thereof, and around the first conductive plate, the insulating substrate, the second conductive plate, the conductive pad, the semiconductor element, and the circuit board, and a silicone gel in a region bounded by the metal substrate and the resin case. The circuit board comprises a plurality of planar surfaces oriented perpendicular to the mounting surface of the metal substrate.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: February 19, 2019
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Shuji Kamata
  • Publication number: 20180286775
    Abstract: A semiconductor module includes a metal substrate having a mounting surface, a first conductive plate on the mounting surface, an insulating substrate on the first conductive plate, a second conductive plate on the insulating substrate, a conductive pad on the insulating substrate, a semiconductor element on the second conductive plate, a circuit board electrically connected to the conductive pad, a resin case connected to the metal substrate and extending along at least a portion thereof, and around the first conductive plate, the insulating substrate, the second conductive plate, the conductive pad, the semiconductor element, and the circuit board, and a silicone gel in a region bounded by the metal substrate and the resin case. The circuit board comprises a plurality of planar surfaces oriented perpendicular to the mounting surface of the metal substrate.
    Type: Application
    Filed: August 29, 2017
    Publication date: October 4, 2018
    Inventor: Shuji KAMATA
  • Publication number: 20160043205
    Abstract: A semiconductor device according to embodiments includes: a semiconductor substrate including; a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type above the first semiconductor layer; a third semiconductor layer above the second semiconductor layer; a plurality of gate layers arranged inside the semiconductor substrate, the gate layers extending in a first direction and being arranged in line in a second direction orthogonal to the first direction; a plurality of first semiconductor regions of the second conductivity type arranged on the third semiconductor layer between a first gate layer and a second gate layer of the gate layers, the first and second gate layers being adjacent to each other; a gate insulating film having a larger film thickness at a region excluding the first semiconductor regions than at the first semiconductor regions; an emitter electrode; and a collector.
    Type: Application
    Filed: March 10, 2015
    Publication date: February 11, 2016
    Inventor: Shuji Kamata
  • Publication number: 20150243771
    Abstract: A semiconductor device according to embodiments includes a semiconductor substrate, first semiconductor layers of a first conductive type provided on a surface of the semiconductor substrate, extend in a first direction, and are surrounded by a gate layer, second semiconductor layers of the first conductive type provided between the first semiconductor layers, a third semiconductor layer of the first conductive type provided at ends of the first direction of the first semiconductor layers and is surrounded by the gate layer, a fourth semiconductor layer of a second conductive type provided in the semiconductor substrate, a sixth semiconductor layer of the first conductive type provided on a back surface of the semiconductor substrate, a seventh semiconductor layer of the second conductive type provided between the sixth semiconductor layer and the first semiconductor layers, an emitter electrode, and a collector electrode.
    Type: Application
    Filed: August 28, 2014
    Publication date: August 27, 2015
    Inventor: Shuji Kamata
  • Patent number: 9111990
    Abstract: A semiconductor device according to embodiments includes a semiconductor substrate, first semiconductor layers of a first conductive type provided on a surface of the semiconductor substrate, extend in a first direction, and are surrounded by a gate layer, second semiconductor layers of the first conductive type provided between the first semiconductor layers, a third semiconductor layer of the first conductive type provided at ends of the first direction of the first semiconductor layers and is surrounded by the gate layer, a fourth semiconductor layer of a second conductive type provided in the semiconductor substrate, a sixth semiconductor layer of the first conductive type provided on a back surface of the semiconductor substrate, a seventh semiconductor layer of the second conductive type provided between the sixth semiconductor layer and the first semiconductor layers, an emitter electrode, and a collector electrode.
    Type: Grant
    Filed: August 28, 2014
    Date of Patent: August 18, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shuji Kamata
  • Patent number: 9024430
    Abstract: A semiconductor device includes a semiconductor element in a frame body. The semiconductor element includes a first electrode electrically connected to an electrode block provided on a first side of the semiconductor element. A connection element, which in some embodiments may be a portion of the electrode block, connects the electrode block to the frame body. The semiconductor element is sealed within an enclosure formed at least in part by the frame body, the connection element, and the electrode block. The connection element includes a fragile portion which has a resistance to increases in pressure or temperature that is less than other portions of the connection element. That is, in general, the fragile portion will fail before other portions of the connection element when pressure or temperature increases, which may occur when, for example, the semiconductor element breaks down.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: May 5, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shuji Kamata
  • Publication number: 20150069589
    Abstract: A semiconductor device includes a semiconductor element in a frame body. The semiconductor element includes a first electrode electrically connected to an electrode block provided on a first side of the semiconductor element. A connection element, which in some embodiments may be a portion of the electrode block, connects the electrode block to the frame body. The semiconductor element is sealed within an enclosure formed at least in part by the frame body, the connection element, and the electrode block. The connection element includes a fragile portion which has a resistance to increases in pressure or temperature that is less than other portions of the connection element. That is, in general, the fragile portion will fail before other portions of the connection element when pressure or temperature increases, which may occur when, for example, the semiconductor element breaks down.
    Type: Application
    Filed: February 28, 2014
    Publication date: March 12, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Shuji KAMATA
  • Publication number: 20120241814
    Abstract: A power semiconductor device includes a p-type collector layer, an n-type base layer, a p-type base layer, an n-type source layer, and a gate electrode. The gate electrode is formed in a trench running from a surface of the n-type source layer through the n-type source layer and the p-type base layer to an interior of the n-type base layer via a gate insulating film. The gate electrode includes a first portion and a second portion. The first portion is opposed to a bottom end portion of the p-type base layer. The second portion is opposed to an upper end portion of the p-type base layer. The gate electrode is formed such that a threshold at the bottom end portion of the p-type base layer is not less than a threshold at the upper end portion of the p-type base layer.
    Type: Application
    Filed: March 20, 2012
    Publication date: September 27, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shuji KAMATA, Masakazu Kobayashi
  • Publication number: 20110284923
    Abstract: A semiconductor device includes: a first semiconductor region; a second semiconductor region provided on a first major surface of the first semiconductor region; a first major electrode; a third semiconductor region provided in a part of a third major surface of the second semiconductor region; a fourth semiconductor region provided in a part of a fourth major surface of the third semiconductor region; a second major electrode; a control electrode; a fifth semiconductor region; and a sixth semiconductor. The fifth semiconductor region is provided passing through the fourth semiconductor region along a direction perpendicular to the fourth major surface of the third semiconductor region. The sixth semiconductor region is provided in contact with a bottom part of the fourth semiconductor region, and has a higher impurity concentration than the third semiconductor region.
    Type: Application
    Filed: March 18, 2011
    Publication date: November 24, 2011
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Shuji KAMATA
  • Publication number: 20110233607
    Abstract: According to one embodiment, a semiconductor device includes a first semiconductor layer of a first conductivity type, a first semiconductor region of a second conductivity type, a second semiconductor region of the first conductivity type, a third semiconductor region of the first conductivity type, a fourth semiconductor region of the second conductivity type, and a control electrode. The first semiconductor region is provided selectively on a first major surface of the first semiconductor layer. The second semiconductor region is provided selectively on the first major surface in contact with the first semiconductor region. The third semiconductor region is provided selectively on a surface of the first semiconductor region. The fourth semiconductor region is provided to face a projecting surface between a side surface and a bottom surface of the first semiconductor region with the second semiconductor region interposed.
    Type: Application
    Filed: March 17, 2011
    Publication date: September 29, 2011
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Satoshi Yanagisawa, Shuji Kamata
  • Publication number: 20060017159
    Abstract: According to an aspect of the present invention, there is provided a semiconductor device including a lead frame, a semiconductor chip, a back surface opposed to a main surface of the semiconductor chip disposed on the lead frame, a first electrode formed on the main surface of the semiconductor chip, the first electrode being composed of Al as a main component, a wiring, one end portion of the wiring being connected to the first electrode, and the other end portion of the wiring being connected to a lead terminal of the lead frame, a second electrode formed on the first electrode, the second electrode selectively formed except an area at least connected the one end portion of the wiring, and being composed of Cu as a main component.
    Type: Application
    Filed: July 21, 2005
    Publication date: January 26, 2006
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Shuji Kamata
  • Patent number: 6060744
    Abstract: In a current detecting cell of a MOS-type semiconductor device with a current detection function, the area of the contact portions of source regions which contact a current detecting electrode is greater than that of that contact portion of a base region which contacts the current detecting electrode. With this feature, a parasitic resistance does no sharply decrease even if a detected voltage increases, and therefore, current can be detected accurately.
    Type: Grant
    Filed: October 28, 1997
    Date of Patent: May 9, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masashi Kuwahara, Shuji Kamata