Abstract: A microcontroller is realized that is capable of eliminating the time lag required for changing the frequency during operation and of reducing power consumption by accurately and rapidly performing the frequency control in accordance with the task. Since frequency control can be performed in the pipeline processing of the execution instruction by adding a frequency control signal for determining the division ratio of the system clock to the operation code and fetching and decoding the frequency control signal together with the operation code by the pipeline processing, the time lag required for changing the frequency can be eliminated.

Abstract: A storage device system includes an information processing device, a first storage device equipped with a first storage volume, and a second storage device equipped with a second storage volume. The information processing device and the first storage device are communicatively connected to one another. Also, the first storage device and the second storage device are communicatively connected to one another. The information processing device is equipped with a first write request section that requests to write data in the first storage device according to a first communications protocol, and a second write request section that requests to write data in the second storage device according to a second communications protocol. The information processing device creates first data including a first instruction to be executed in the second storage device.

Abstract: A storage device system includes an information processing device, a first storage device equipped with a first storage volume, and a second storage device equipped with a second storage volume. The information processing device and the first storage device are communicatively connected to one another. Also, the first storage device and the second storage device are communicatively connected to one another. The information processing device is equipped with a first write request section that requests to write data in the first storage device according to a first communications protocol, and a second write request section that requests to write data in the second storage device according to a second communications protocol. The information processing device creates first data including a first instruction to be Executed in the second storage device.

Abstract: A branching point on a wire is detected in the layout results S101. A delay amount of a route with a dummy buffer being inserted on a wire subsequent to the branching point S102 and that of the route without a dummy buffer being inserted are then calculated S103. Based on the delay amounts, an insertion point at which a load-dividing buffer is to be inserted is determined S104. On condition that a load-dividing buffer is to be inserted at the insertion point, the drive capability of a driving cell preceding the insertion point is calculated so that timing constraints are satisfied S105. Then, after it is confirmed that a load-dividing buffer is insertable at the determined insertion point S106, processes of placing a load-dividing buffer, changing the drive capability of the driving cell, and changing wiring information are performed on the layout results S107.

Abstract: A storage device system includes an information processing device and at least first and second storage devices. The first and second storage devices are equipped with first and second storage volumes, respectively. The information processing device generates first data including a first instruction that is to be executed by the second storage device, and sends a write request to a first write request section to write the first data according to a first communications protocol in the first storage volume. When the first data written in the first storage volume is the command to be executed by the second storage device, the first storage device sends to a second write request section a write request to write the first data according to a second communications protocol in the second storage volume. The second storage device executes the first command set in the first data that is written in the second storage volume.

Abstract: A first storage subsystem 100A includes a first storage device 6A1 and one or more second storage devices 6A2, 6A3. A second storage subsystem 100B includes a third storage device 6B1 and a fourth storage device 6B2. A third storage subsystem 100C comprises a fifth storage device 6C1 and a sixth storage device 6C2. The first storage subsystem 100A generates a data set comprising an update number expressing the update order of the first storage device 6A1 and write data stored in the first storage device 6A1, stores the generated data set in the one or more second storage devices 6A2, 6A3, and transmits the data set to the second and third storage subsystems 100B, 100C.

Abstract: A first storage subsystem 100A comprises a first storage device 6A1 and one or more second storage devices 6A2, 6A3. A second storage subsystem 100B comprises a third storage device 6B1 and a fourth storage device 6B2. A third storage subsystem 100C comprises a fifth storage device 6C1 and a sixth storage device 6C2. The first storage subsystem 100A generates a data set comprising an update number expressing the update order of the first storage device 6A1 and write data stored in the first storage device 6A1, stores the generated data set in the one or more second storage devices 6A2, 6A3, and transmits the data set to the second and third storage subsystems 100B, 100C.

Abstract: A storage device system includes an information processing device, a first storage device equipped with a first storage volume, and a second storage device equipped with a second storage volume. The information processing device and the first storage device are communicatively connected to one another. Also, the first storage device and the second storage device are communicatively connected to one another. The information processing device is equipped with a first write request section that requests to write data in the first storage device according to a first communications protocol, and a second write request section that requests to write data in the second storage device according to a second communications protocol. The information processing device creates first data including a first instruction to be executed in the second storage device.

Abstract: A storage device system includes an information processing device and at least first and second storage devices. The first and second storage devices are equipped with first and second storage volumes, respectively. The information processing device generates first data including a first instruction that is to be executed by the second storage device, and sends a write request to a first write request section to write the first data according to a first communications protocol in the first storage volume. When the first data written in the first storage volume is the command to be executed by the second storage device, the first storage device sends to a second write request section a write request to write the first data according to a second communications protocol in the second storage volume. The second storage device executes the first command set in the first data that is written in the second storage volume.

Abstract: A storage device system includes an information processing device and at least first and second storage devices. The first and second storage devices are equipped with first and second storage volumes, respectively. The information processing device generates first data including a first instruction that is to be executed by the second storage device, and sends a write request to a first write request section to write the first data according to a first communications protocol in the first storage volume. When the first data written in the first storage volume is the command to be executed by the second storage device, the first storage device sends to a second write request section a write request to write the first data according to a second communications protocol in the second storage volume. The second storage device executes the first command set in the first data that is written in the second storage volume.

Abstract: A storage device system includes an information processing device, a first storage device equipped with a first storage volume, and a second storage device equipped with a second storage volume. The information processing device and the first storage device are communicatively connected to one another. Also, the first storage device and the second storage device are communicatively connected to one another. The information processing device is equipped with a first write request section that requests to write data in the first storage device according to a first communications protocol, and a second write request section that requests to write data in the second storage device according to a second communications protocol. The information processing device creates first data including a first instruction to be executed in the second storage device.

Abstract: A storage device system includes an information processing device and at least first and second storage devices. The first and second storage devices are equipped with first and second storage volumes, respectively. The information processing device generates first data including a first instruction that is to be executed by the second storage device, and sends a write request to a first write request section to write the first data according to a first communications protocol in the first storage volume. When the first data written in the first storage volume is the command to be executed by the second storage device, the first storage device sends to a second write request section a write request to write the first data according to a second communications protocol in the second storage volume. The second storage device executes the first command set in the first data that is written in the second storage volume.

Abstract: A microprocessor is provided whose power consumption is reduced optimally according to an execution instruction code and an operational mode. In addition to a first PLA used in a normal operation, a second PLA dedicated for execution of certain instructions frequently used in a slow mode is provided. When instruction codes and state signals to be executed in the slow mode match data set in the second PLA, the operation of the first PLA is stopped, and the microprocessor is controlled according to a microcode output from the second PLA.

Abstract: A branching point on a wire is detected in the layout results S101. A delay amount of a route with a dummy buffer being inserted on a wire subsequent to the branching point S102 and that of the route without a dummy buffer being inserted are then calculated S103. Based on the delay amounts, an insertion point at which a load-dividing buffer is to be inserted is determined S104. On condition that a load-dividing buffer is to be inserted at the insertion point, the drive capability of a driving cell preceding the insertion point is calculated so that timing constraints are satisfied S105. Then, after it is confirmed that a load-dividing buffer is insertable at the determined insertion point S106, processes of placing a load-dividing buffer, changing the drive capability of the driving cell, and changing wiring information are performed on the layout results S107.

Abstract: A microcontroller is realized that is capable of eliminating the time lag required for changing the frequency during operation and of reducing power consumption by accurately and rapidly performing the frequency control in accordance with the task. Since frequency control can be performed in the pipeline processing of the execution instruction by adding a frequency control signal for determining the division ratio of the system clock to the operation code and fetching and decoding the frequency control signal together with the operation code by the pipeline processing, the time lag required for changing the frequency can be eliminated.

Abstract: A microprocessor is provided whose power consumption is reduced optimally according to an execution instruction code and an operational mode. In addition to a first PLA used in a normal operation, a second PLA dedicated for execution of certain instructions frequently used in a slow mode is provided. When instruction codes and state signals to be executed in the slow mode match data set in the second PLA, the operation of the first PLA is stopped, and the microprocessor is controlled according to a microcode output from the second PLA.

Abstract: A stabilized aqueous liquid preparation of human blood coagulation factor XIII, prepared by recombinant DNA technology, from the group consisting of galactose, sucrose, sorbitol, glutamate, aspartate and histidine and where little reduction in biological activity occurs even when stored for a longer time.

Abstract: An oscillator in which organic substances derived from an active element fixing adhesive do not deposit on an oscillating element and in which when the active element or the oscillating element is damaged, other good parts that are not defective can be reused. In the oscillator, an active element 2 is mounted inside a first container 1 whose upper surface is opened, and not only the opening of the first container 1 is closed by an oscillating unit 3 having an oscillating element 6 incorporated therein, but also the oscillating unit 3 is attached onto the opening of the first container 1, so that second connecting electrodes 11a to 11d of a second container 5 of the oscillating unit 3 are electrically connected to first connecting electrodes 14a to 14d of the first container 1.

Abstract: The invention is an electronic component device in the form of an envelope including a glass cover and a glass shell bonded together for hermetically sealing a surface acoustic filter inside the envelope. Electrical connections are provided from the filter's electrodes to the outside of the envelope by means of through holes in the cover. Each through hole has an electrode disposed around its periphery on the upper and bottom surfaces of the cover and a conductive layer disposed on the internal surface of the hole. A metal foil is formed on the bottom electrode sealing the hole and pressed downward and deformed against a filter electrode to complete a connection between the filter electrode, the metal foil, the conductor layer and the electrodes disposed around the periphery of the hole, and to hermetically seal the hole.