Patents by Inventor Shuji Mizokuchi

Shuji Mizokuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9853126
    Abstract: A gate electrode is formed in a trench reaching a drain region so as to leave a concave portion on the top of the trench. A first insulating film is formed, which fills the concave portion and of which the thickness increases as the distance from an end of the trench increases on the substrate surface on both sides of the trench. First and second source regions are formed in a self-alignment manner by introduction of impurities through the first insulating film.
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: December 26, 2017
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Shuji Mizokuchi, Ryousuke Ookawa, Naoki Sato
  • Publication number: 20160204248
    Abstract: A gate electrode is formed in a trench reaching a drain region so as to leave a concave portion on the top of the trench. A first insulating film is formed, which fills the concave portion and of which the thickness increases as the distance from an end of the trench increases on the substrate surface on both sides of the trench. First and second source regions are formed in a self-alignment manner by introduction of impurities through the first insulating film.
    Type: Application
    Filed: March 18, 2016
    Publication date: July 14, 2016
    Inventors: SHUJI MIZOKUCHI, RYOUSUKE OOKAWA, NAOKI SATO
  • Patent number: 9324837
    Abstract: A gate electrode is formed in a trench reaching a drain region so as to leave a concave portion on the top of the trench. A first insulating film is formed, which fills the concave portion and of which the thickness increases as the distance from an end of the trench increases on the substrate surface on both sides of the trench. First and second source regions are formed in a self-alignment manner by introduction of impurities through the first insulating film.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: April 26, 2016
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Shuji Mizokuchi, Ryousuke Ookawa, Naoki Sato
  • Publication number: 20150011066
    Abstract: A gate electrode is formed in a trench reaching a drain region so as to leave a concave portion on the top of the trench. A first insulating film is formed, which fills the concave portion and of which the thickness increases as the distance from an end of the trench increases on the substrate surface on both sides of the trench. First and second source regions are formed in a self-alignment manner by introduction of impurities through the first insulating film.
    Type: Application
    Filed: September 26, 2014
    Publication date: January 8, 2015
    Inventors: Shuji MIZOKUCHI, Ryousuke OOKAWA, Naoki SATO
  • Patent number: 8089122
    Abstract: A first region functioning as a transistor includes a drain region, a body region formed over the drain region, a source region formed over the body region and a trench formed through the body region and having a gate electrode buried therein. A source region is formed over the body region extending in a second region. The source region forming an upper edge of the trench is rounded.
    Type: Grant
    Filed: January 27, 2010
    Date of Patent: January 3, 2012
    Assignee: Panasonic Corporation
    Inventors: Shuji Mizokuchi, Kazuaki Tsunoda
  • Patent number: 7968942
    Abstract: The present invention provides a semiconductor apparatus having high reliability with respect to a withstand voltage, leakage characteristics, etc. by disposing a structure of preventing stress occurring by metal wiring from directly acting on a trench relating to the semiconductor apparatus having a trench gate.
    Type: Grant
    Filed: October 29, 2008
    Date of Patent: June 28, 2011
    Assignee: Panasonic Corporation
    Inventors: Tatsumi Kumekawa, Mitsuhiro Hamada, Shuji Mizokuchi
  • Publication number: 20100127322
    Abstract: A first region functioning as a transistor includes a drain region, a body region formed over the drain region, a source region formed over the body region and a trench formed through the body region and having a gate electrode buried therein. A source region is formed over the body region extending in a second region. The source region forming an upper edge of the trench is rounded.
    Type: Application
    Filed: January 27, 2010
    Publication date: May 27, 2010
    Applicant: Panasonic Corporation
    Inventors: Shuji Mizokuchi, Kazuaki Tsunoda
  • Patent number: 7709888
    Abstract: A semiconductor substrate is formed with trenches, and each of the trenches includes: a gate electrode portion in which a gate electrode is arranged; and a gate lead portion which is brought into contact with an interconnect for electrically connecting the gate electrode to the outside. In the gate lead portion for electrically connecting the gate electrode to the outside, an end of each of the trenches has a greater width than a portion of the trench other than the end.
    Type: Grant
    Filed: September 29, 2005
    Date of Patent: May 4, 2010
    Assignee: Panasonic Corporation
    Inventors: Shuji Mizokuchi, Kazuaki Tsunoda
  • Patent number: 7682909
    Abstract: A first region functioning as a transistor includes a drain region, a body region formed over the drain region, a source region formed over the body region and a trench formed through the body region and having a gate electrode buried therein. A source region is formed over the body region extending in a second region. The source region forming an upper edge of the trench is rounded.
    Type: Grant
    Filed: July 2, 2008
    Date of Patent: March 23, 2010
    Assignee: Panasonic Corporation
    Inventors: Shuji Mizokuchi, Kazuaki Tsunoda
  • Patent number: 7663182
    Abstract: A first region functioning as a transistor includes a drain region, a body region formed over the drain region, a source region formed over the body region and a trench formed through the body region and having a gate electrode buried therein. A source region is formed over the body region extending in a second region. The source region forming an upper edge of the trench is rounded.
    Type: Grant
    Filed: December 9, 2005
    Date of Patent: February 16, 2010
    Assignee: Panasonic Corporation
    Inventors: Shuji Mizokuchi, Kazuaki Tsunoda
  • Patent number: 7626229
    Abstract: A semiconductor device includes: a semiconductor substrate; a first semiconductor region formed in the reverse surface region of the semiconductor substrate and including a first conductivity type impurity; a second semiconductor region formed on the first semiconductor region in the semiconductor substrate and including a second conductivity type impurity; a third semiconductor region formed on the second semiconductor region in the semiconductor substrate and including a first conductivity type impurity; a trench passing through the second and third semiconductor regions and reaching the first semiconductor region; and a gate insulating film formed along the wall face of the trench; a gate electrode formed on the gate insulating film in the trench. Further, a pocket region including a second conductivity type impurity of which peak concentration is higher than that of the second semiconductor region is formed by a side of the trench between the second semiconductor region and the third semiconductor region.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: December 1, 2009
    Assignee: Panasonic Corporation
    Inventors: Satoe Miyata, Shuji Mizokuchi
  • Publication number: 20090108344
    Abstract: The present invention provides a semiconductor apparatus having high reliability with respect to a withstand voltage, leakage characteristics, etc. by disposing a structure of preventing stress occurring by metal wiring from directly acting on a trench relating to the semiconductor apparatus having a trench gate.
    Type: Application
    Filed: October 29, 2008
    Publication date: April 30, 2009
    Inventors: Tatsumi KUMEKAWA, Mitsuhiro Hamada, Shuji Mizokuchi
  • Patent number: 7518186
    Abstract: A gate electrode is buried in a trench passing through a second conductivity type first body region formed on a first conductivity type drain region so as to form a recessed portion at the upper part of the trench. An insulating film is formed on the gate electrode so as to occupy the recessed portion partway. A first conductivity type source region is formed in at least a region of the upper part of the first body region which serves as at least the wall part of the trench. A second conductivity type second body region is formed in the other region of the upper part thereof so as to be adjacent to the source region in the direction that the trench extends. A second conductivity type third body region is formed in the respective upper parts of the source region and the second body region.
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: April 14, 2009
    Assignee: Panasonic Corporation
    Inventor: Shuji Mizokuchi
  • Publication number: 20080299727
    Abstract: A first region functioning as a transistor includes a drain region, a body region formed over the drain region, a source region formed over the body region and a trench formed through the body region and having a gate electrode buried therein. A source region is formed over the body region extending in a second region. The source region forming an upper edge of the trench is rounded.
    Type: Application
    Filed: July 2, 2008
    Publication date: December 4, 2008
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Shuji Mizokuchi, Kazuaki Tsunoda
  • Publication number: 20080211017
    Abstract: A semiconductor substrate is formed with trenches, and each of the trenches includes: a gate electrode portion in which a gate electrode is arranged; and a gate lead portion which is brought into contact with an interconnect for electrically connecting the gate electrode to the outside. In the gate lead portion for electrically connecting the gate electrode to the outside, an end of each of the trenches has a greater width than a portion of the trench other than the end.
    Type: Application
    Filed: September 29, 2005
    Publication date: September 4, 2008
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Shuji Mizokuchi, Kazuaki Tsunoda
  • Patent number: 7372088
    Abstract: A source region is formed by performing ion implantation plural times to diffuse an impurity from the upper surface of a semiconductor region toward a region far dawn therefrom and to increase impurity concentration in the vicinity of the upper surface of the semiconductor region, whereby the source region and a gate electrode are overlapped with each other surely. Thus, offset between the gate and the source is prevented and an excellent ohmic contact is formed between a source electrode and the source region.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: May 13, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Satoe Miyata, Shuji Mizokuchi
  • Publication number: 20080012069
    Abstract: A gate electrode is buried in a trench passing through a second conductivity type first body region formed on a first conductivity type drain region so as to form a recessed portion at the upper part of the trench. An insulating film is formed on the gate electrode so as to occupy the recessed portion partway. A first conductivity type source region is formed in at least a region of the upper part of the first body region which serves as at least the wall part of the trench. A second conductivity type second body region is formed in the other region of the upper part thereof so as to be adjacent to the source region in the direction that the trench extends. A second conductivity type third body region is formed in the respective upper parts of the source region and the second body region.
    Type: Application
    Filed: June 29, 2007
    Publication date: January 17, 2008
    Inventor: Shuji Mizokuchi
  • Patent number: 7271441
    Abstract: The semiconductor device includes a first semiconductor region of a first conductivity type partially extending to a top face of a semiconductor substrate; a second semiconductor region of a second conductivity type formed on the first semiconductor region; a third semiconductor region of the first conductivity type formed on the second semiconductor region; a fourth semiconductor region of the second conductivity type formed on the second semiconductor region and adjacent to the third semiconductor region; a trench penetrating through the second semiconductor region and the third semiconductor region; a gate insulating film formed on an inner wall of the trench; and a gate electrode formed on the gate insulating film within the trench.
    Type: Grant
    Filed: October 31, 2005
    Date of Patent: September 18, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Satoe Miyata, Shuji Mizokuchi
  • Patent number: 7187041
    Abstract: A first region 11 functioning as a transistor includes a drain region 111, a body region 112 formed over the drain region 111, a source region 113A formed over the body region 112 and a trench formed through the body region 112 and having a gate electrode 120 buried therein. A source region 113B is formed over the body region 112 extending in a second region 12.
    Type: Grant
    Filed: October 13, 2004
    Date of Patent: March 6, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shuji Mizokuchi, Mitsuhiro Yamanaka, Hiroyuki Gunji
  • Publication number: 20060186466
    Abstract: A first region 11 functioning as a transistor includes a drain region 111, a body region 112 formed over the drain region 111, a source region 113A formed over the body region 112 and a trench formed through the body region 112 and having a gate electrode 120 buried therein. A source region 113B is formed over the body region 112 extending in a second region 12.
    Type: Application
    Filed: April 24, 2006
    Publication date: August 24, 2006
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Shuji Mizokuchi, Mitsuhiro Yamanaka, Hiroyuki Gunji