Patents by Inventor Shuji Musha

Shuji Musha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5051806
    Abstract: A gate turn-off (GTO) thyristor has a plurality of unit GTO thyristors of strip-like configuration in a same semiconductor substrate, each unit GTO thyristor being constructed of an N emitter layer, P base layer, N base layer and P emitter layer. The P base and N base layers are shared in common for all the unit GTO thyristors which are formed in a multi-ring configuration. The exposed area of the P emitter layer of a unit GTO thyristor located far from the gate signal input area is made smaller than that of the P emitter layer of a unit GTO thyristor located relatively close to the gate signal input area.
    Type: Grant
    Filed: July 27, 1989
    Date of Patent: September 24, 1991
    Assignee: Hitachi, Ltd.
    Inventors: Toshihide Ujihara, Shuroku Sakurada, Tadashi Sakaue, Shuji Musha
  • Patent number: 4868625
    Abstract: A gate turn-off (GTO) thyristor has a plurality of unit GTO thyristors of strip-like configuration in a same semiconductor substrate, each unit GTO thyristor being constructed of an N emitter layer, P base layer, N base layer and P emitter layer. The P base and N base layers are shared in common for all the unit GTO thyristors which are formed in a multi-ring configuration. The exposed area of the P emitter layer of a unit GTO thyristor located far from the gate signal input area is made smaller than that of the P emitter layer of a unit GTO thyristor located relatively closer to the gate signal input area.
    Type: Grant
    Filed: July 8, 1987
    Date of Patent: September 19, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Toshihide Ujihara, Shuroku Sakurada, Tadashi Sakaue, Shuji Musha
  • Patent number: 4612561
    Abstract: A parallel connected gate turn-off thyristor device including an additional short circuiting conductor connected between the gate terminals of the respective gate turn-off thyristors so as to bypass a part of the turn-on and turn-off gate currents of one gate turn-off thyristor to other gate turn-off thyristors to increase the turn-on and turn-off gate currents of the other gate turn-off thyristors thereby hastening the turn-on and turn-off operations of the other gate turn-off thyristors.
    Type: Grant
    Filed: June 27, 1983
    Date of Patent: September 16, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Shin Kimura, Hiroshi Fukui, Shinji Yamada, Shuji Musha, Masayoshi Sato
  • Patent number: 4568838
    Abstract: A control circuit for a semiconductor element with a control electrode includes a signal transmission circuit, in which two switching elements made conductive when a control signal is supplied from a control signal source to the switching elements through a signal insulating element, are provided so that the control signal is transferred to a turn-on circuit for the semiconductor element only when the switching elements are simultaneously made conductive.
    Type: Grant
    Filed: June 28, 1985
    Date of Patent: February 4, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Kazuo Honda, Yasuo Matsuda, Shuji Musha
  • Patent number: 4456836
    Abstract: A gate circuit for gate turn-off thyristors is disclosed which includes a turn-on circuit formed of a series combination of a turn-on power source and an NPN transistor and a turn-off circuit formed of a series combination of a turn-off power source and a thyristor, and in which a PNP transistor is provided between the anode and gate of the thyristor in such a manner that the base of the NPN transistor and the base of the PNP transistor are connected to each other and a junction of these bases receives a control signal for turning on or off a gate turn-off thyristor.
    Type: Grant
    Filed: December 29, 1981
    Date of Patent: June 26, 1984
    Assignee: Hitachi, Ltd.
    Inventors: Yasuo Matsuda, Kazuo Honda, Hiroshi Fukui, Hisao Amano, Shuji Musha