Patents by Inventor Shuji Shukuri

Shuji Shukuri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5357464
    Abstract: Disclosed is a semiconductor memory having a self-amplifying cell structure, using (1) a writing transistor and (2) a reading transistor with a floating gate as a charge storage node for each memory cell, and a method of fabricating the memory cell. The writing transistor and reading transistor are of opposite conductivity type to each other; for example, the writing transistor uses a P-channel MOS transistor and the reading transistor (having the floating gate) uses an N-channel MOS transistor. The floating gate of the reading transistor is connected to a single bit line through a source-drain path of the writing transistor, the source-drain path of the reading transistor is connected between the single bit line and a predetermined potential, and the gate electrodes of the writing and reading transistors are connected to a single word line. At least the reading transistor can be formed in a trench, and the word line can be formed overlying the writing transistor and the reading transistor in the trench.
    Type: Grant
    Filed: February 26, 1993
    Date of Patent: October 18, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Shuji Shukuri, Toru Koga, Shinichiro Kimura, Digh Hisamoto, Kazuhiko Sagara, Tokuo Kure, Eiji Takeda