Patents by Inventor Shuji Wakaiki

Shuji Wakaiki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11658089
    Abstract: The present invention relates to a semiconductor device including a printed circuit board, an electronic component, and a heat diffusion part. The printed circuit board includes an insulation layer, first and second conductor layers disposed respectively on first and second main faces of the insulation layer, a plurality of heat radiation vias penetrating from the first conductor layer to the second conductor layer on the insulation layer, and a conductor film covering inner side walls of the heat radiation vias. The heat radiation vias are provided at positions overlapping the electronic component and the heat radiation part in plan view viewed from the first main face of the printed circuit board. The heat diffusion part is disposed overlapping at least some of the heat radiation vias in plan view viewed from the second main face of the printed circuit board.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: May 23, 2023
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Shuji Wakaiki, Shota Sato, Kenta Fujii, Takashi Kumagai
  • Publication number: 20220200236
    Abstract: A laser beam generation device includes power supply units, LD modules, a combiner, and a control device. The LD modules receive currents from the power supply units, and output laser beams. The combiner collects the laser beams and outputs one laser beam. The control device generates control signals such that power of the laser beam becomes a laser output setting value and such that the currents become current command values. Phases of pulses of the control signals are shifted from each other by 60 degrees.
    Type: Application
    Filed: May 25, 2020
    Publication date: June 23, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yoshimichi SAITO, Shuji WAKAIKI, Hiroshi IKARASHI, Shingo TSUDA, Hideyasu MACHII, Masato MATSUBARA
  • Publication number: 20200388550
    Abstract: The present invention relates to a semiconductor device including a printed circuit board, an electronic component, and a heat diffusion part. The printed circuit board includes an insulation layer, first and second conductor layers disposed respectively on first and second main faces of the insulation layer, a plurality of heat radiation vias penetrating from the first conductor layer to the second conductor layer on the insulation layer, and a conductor film covering inner side walls of the heat radiation vias. The heat radiation vias are provided at positions overlapping the electronic component and the heat radiation part in plan view viewed from the first main face of the printed circuit board. The heat diffusion part is disposed overlapping at least some of the heat radiation vias in plan view viewed from the second main face of the printed circuit board.
    Type: Application
    Filed: December 11, 2018
    Publication date: December 10, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Shuji WAKAIKI, Shota SATO, Kenta FUJII, Takashi KUMAGAI
  • Publication number: 20200343155
    Abstract: A power conversion device that provides high heat dissipation and is easy to assemble. A power conversion device includes: a first heat dissipator; a second heat dissipator; a printed board having a first circuit pattern formed thereon; a first insulating member provided between first heat dissipator and printed board; a switching element including an electrode portion electrically bonded to first circuit pattern with a first bonding member interposed therebetween; a first fixing member bonded to an exposed surface of electrode portion; a heat dissipating member having one end bonded to first fixing member, and the other end provided between the switching element and second heat dissipator; a second insulating member sandwiched between second heat dissipator and switching element; and an installation portion.
    Type: Application
    Filed: January 9, 2019
    Publication date: October 29, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hiroyuki KIYONAGA, Kenta FUJII, Tomohito FUKUDA, Shuji WAKAIKI, Takashi KUMAGAI, Hiroshi IKARASHI
  • Publication number: 20200098660
    Abstract: A semiconductor device includes a printed board, an electronic component, and a thermal diffuser. The electronic component and the thermal diffuser are bonded onto one main surface of the printed board. The electronic component and the thermal diffuser are electrically and thermally bonded to each other by a bonding material. The printed board includes an insulating layer and a plurality of radiation vias penetrating from the main surface to the other main surface of the printed board. At least a part of the plurality of radiation vias overlaps the electronic component, and at least another part of the plurality of radiation vias overlaps the thermal diffuser. At least a part of the plurality of radiation vias is disposed so as to overlap a heat radiator at a transmission viewpoint from the main surface of the printed board.
    Type: Application
    Filed: May 21, 2018
    Publication date: March 26, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Shuji WAKAIKI, Shota SATO, Kenta FUJII, Takashi KUMAGAI
  • Patent number: 9935551
    Abstract: A high-withstand-voltage normally-on transistor and a low-withstand-voltage normally-off transistor are connected in series, and diodes are provided in reverse parallel to the transistor. A gate terminal of the transistor is connected to a source terminal of the transistor, and a gate driving circuit that outputs a control signal to a gate terminal of the transistor is provided. Forward voltage of the diode is made lower than forward voltage of the diode, and an inductance component of a path connecting nodes via the diode is made greater than an inductance component of a path connecting the nodes via the diode. Accordingly, a switching circuit which includes transistors connected in series and in which transient current at a time of turning off is reduced is provided.
    Type: Grant
    Filed: February 24, 2015
    Date of Patent: April 3, 2018
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kohtaroh Kataoka, Takeshi Shiomi, Shuji Wakaiki, Hiroki Igarashi, Akihide Shibata, Hiroshi Iwata
  • Patent number: 9831756
    Abstract: The switching power supply device is provided with a high-withstand voltage first transistor, a first electrode of which being connected to a first node; a low-withstand voltage second transistor, a first electrode of which being connected to a second electrode of the first transistor, and a second electrode of which being connected to a second node; and a drive circuit. Each of the first and second transistors has a parasitic diode connected in the forward direction between the second and first electrodes. The drive circuit, in a case where electrical current is to flow from the first node to the second node, turns on the first and second transistors, and, in a case where electrical current is to flow from the second node to the first node, turns on the first transistor, and turns off the second transistor.
    Type: Grant
    Filed: September 11, 2012
    Date of Patent: November 28, 2017
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kenji Komiya, Shuji Wakaiki, Akihide Shibata, Hiroshi Iwata
  • Patent number: 9793793
    Abstract: A power factor correction circuit includes: a coil and MOSFETs that boost an input voltage to generate a boosted voltage; a first capacitor having one end connected to a first output terminal, and the other end connected to an intermediate node; and a second capacitor having one end connected to the intermediate node, and the other end connected to a second output terminal. In a first operation mode, the boosted vol tage is applied to the two ends of the first capacitor when a positive voltage is input, and applied to the two ends of the second capacitor when a negative voltage is input. In a second operation mode, the boosted voltage is applied to two ends of the first and second capacitors connected in series. Thus, there is provided a power factor correction circuit which has a high efficiency and is compatible with an input voltage in a broad range.
    Type: Grant
    Filed: June 9, 2016
    Date of Patent: October 17, 2017
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Kohtaroh Kataoka, Masaru Nomura, Shuji Wakaiki, Hiroki Igarashi, Akihide Shibata, Hiroshi Iwata, Takeshi Shiomi
  • Patent number: 9755498
    Abstract: A boost circuit includes multiple switching circuits connected in parallel. Each switching circuit includes first through third transistors and a resistor. The first transistor, the resistor, and the second transistor are serially connected between first and second nodes. The third transistor is connected between the source of the first transistor and the second node. A conductance Gm (S) of the second transistor and a resistance r (?) of the resistor are respectively configured to be within ranges of 1?Gm?1000 and 7×Gm?1.6?r?170×Gm?1. Since the first transistor having a high breakdown voltage is turned on by turning on the second transistor, variations in turn-on time of the boost circuit are reduced.
    Type: Grant
    Filed: July 20, 2016
    Date of Patent: September 5, 2017
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Shuji Wakaiki, Akihide Shibata, Hiroshi Iwata
  • Patent number: 9698710
    Abstract: A solar energy utilization system includes a solar panel, a motor driven by an inverter circuit functioning as a motor drive circuit with power output by the solar panel, a solar output voltage monitor functioning as a monitor that monitors an input or an output of the solar panel and also functioning as a monitor that monitors an input or an output of the inverter circuit, and a controller. The controller has a control mode in which the inverter circuit is controlled such that an output voltage of the solar panel is maintained at a voltage higher than a maximum power point voltage. In this control mode, the controller performs the control such that a rotation speed of the motor is changed repeatedly at predetermined timings.
    Type: Grant
    Filed: April 7, 2014
    Date of Patent: July 4, 2017
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kohtaroh Kataoka, Masaru Nomura, Takeshi Shiomi, Shuji Wakaiki, Akihide Shibata, Hiroshi Iwata
  • Patent number: 9660513
    Abstract: A control circuit is driven by a driving voltage (VOC) generated by a generator circuit, and outputs a control signal. A drive circuit is driven by a driving voltage (VOD) generated by another generator circuit, and turns a switching element inside a switching circuit on or off by supplying, to the switching circuit, a drive signal based on the control signal. During activation of a switching device, a voltage generation controller detects a voltage value of the output voltage (VOC) of the generator circuit, and allows activation of the other generator circuit after verifying that the detected voltage value is at or above a designated threshold.
    Type: Grant
    Filed: March 24, 2014
    Date of Patent: May 23, 2017
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kohtaroh Kataoka, Masaru Nomura, Takeshi Shiomi, Shuji Wakaiki, Akihide Shibata, Hiroshi Iwata
  • Patent number: 9627973
    Abstract: A highly efficient and low-cost switching power supply device includes a high withstand voltage transistor and a low withstand voltage transistor. When current flows from a second node to a first node, the high withstand voltage transistor turns on and the low withstand voltage transistor turns off, causing current to flow through a built-in diode of the low withstand voltage transistor. Since current does not flow through the parasitic diode of the high withstand voltage transistor, the recovery current is reduced. Furthermore, since a first delay circuit including resistors and a diode is connected to the gate electrode of the high withstand voltage transistor, and a second delay circuit including resistors and a diode is connected to the gate electrode of the low withstand voltage transistor, precise adjustment of the switching speed during switching operation is possible, and losses are reduced.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: April 18, 2017
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Akihide Shibata, Shuji Wakaiki, Kohtaroh Kataoka, Takeshi Shiomi, Hiroki Igarashi, Hiroshi Iwata
  • Publication number: 20170104416
    Abstract: A high-withstand-voltage normally-on transistor and a low-withstand-voltage normally-off transistor are connected in series, and diodes are provided in reverse parallel to the transistor. A gate terminal of the transistor is connected to a source terminal of the transistor, and a gate driving circuit that outputs a control signal to a gate terminal of the transistor is provided. Forward voltage of the diode is made lower than forward voltage of the diode, and an inductance component of a path connecting nodes via the diode is made greater than an inductance component of a path connecting the nodes via the diode. Accordingly, a switching circuit which includes transistors connected in series and in which transient current at a time of turning off is reduced is provided.
    Type: Application
    Filed: February 24, 2015
    Publication date: April 13, 2017
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Kohtaroh KATAOKA, Takeshi SHIOMI, Shuji WAKAIKI, Hiroki IGARASHI, Akihide SHIBATA, Hiroshi IWATA
  • Publication number: 20170093272
    Abstract: A boost circuit includes multiple switching circuits connected in parallel. Each switching circuit includes first through third transistors and a resistor. The first transistor, the resistor, and the second transistor are serially connected between first and second nodes. The third transistor is connected between the source of the first transistor and the second node. A conductance Gm (S) of the second transistor and a resistance r (?) of the resistor are respectively configured to be within ranges of 1?Gm?1000 and 7×Gm?1.6?r?170×Gm?1. Since the first transistor having a high breakdown voltage is turned on by turning on the second transistor, variations in turn-on time of the boost circuit are reduced.
    Type: Application
    Filed: July 20, 2016
    Publication date: March 30, 2017
    Inventors: Shuji WAKAIKI, Akihide SHIBATA, Hiroshi IWATA
  • Patent number: 9590617
    Abstract: A semiconductor device includes a high breakdown voltage, high Gm first transistor and a low breakdown voltage, low Gm second transistor connected in series between first and second nodes, and a low breakdown voltage, high Gm third transistor connected to the second transistor in parallel. When the second transistor is turned on, the first transistor turns on, and furthermore, when the third transistor is turned on, an electrically conducting state is established between the first and second nodes. The second, low breakdown voltage transistor is turned on to turn on the first, high breakdown voltage transistor, and a turn-on time with only limited variation can be achieved.
    Type: Grant
    Filed: April 5, 2012
    Date of Patent: March 7, 2017
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Kenji Komiya, Shuji Wakaiki, Kohtaroh Kataoka, Masaru Nomura, Yoshiji Ohta, Hiroshi Iwata
  • Publication number: 20160380531
    Abstract: A power factor correction circuit includes: a coil and MOSFETs that boost an input voltage to generate a boosted voltage; a first capacitor having one end connected to a first output terminal, and the other end connected to an intermediate node; and a second capacitor having one end connected to the intermediate node, and the other end connected to a second output terminal. In a first operation mode, the boosted vol tage is applied to the two ends of the first capacitor when a positive voltage is input, and applied to the two ends of the second capacitor when a negative voltage is input. In a second operation mode, the boosted voltage is applied to two ends of the first and second capacitors connected in series. Thus, there is provided a power factor correction circuit which has a high efficiency and is compatible with an input voltage in a broad range.
    Type: Application
    Filed: June 9, 2016
    Publication date: December 29, 2016
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Kohtaroh KATAOKA, Masaru NOMURA, Shuji WAKAIKI, Hiroki IGARASHI, Akihide SHIBATA, Hiroshi IWATA, Takeshi SHIOMI
  • Publication number: 20160285386
    Abstract: A switching circuit (10) is used as a high-side rectifying unit of a boost chopper. The switching circuit (10) includes a low-breakdown voltage transistor (11), a high-breakdown voltage transistor (13) having a drain connected to a drain of the low-breakdown voltage transistor (11), and a diode (high-speed flyback diode) (15) having a cathode connected to a source of the low-breakdown voltage transistor (11) and an anode connected to a source of the high-breakdown voltage transistor (13). Before the generation of a flyback current by the turning off of a low-side transistor (22), the low-breakdown voltage transistor (11) is turned on while the high-breakdown voltage transistor (13) is kept off. After that, the low-side transistor (22) is turned off.
    Type: Application
    Filed: September 3, 2014
    Publication date: September 29, 2016
    Inventors: KOHTAROH KATAOKA, SHUJI WAKAIKI, HIROKI IGARASHI, AKIHIDE SHIBATA, HIROSHI IWATA
  • Publication number: 20160172960
    Abstract: A control circuit is driven by a driving voltage (VOC) generated by a generator circuit, and outputs a control signal. A drive circuit is driven by a driving voltage (VOD) generated by another generator circuit, and turns a switching element inside a switching circuit on or off by supplying, to the switching circuit, a drive signal based on the control signal. During activation of a switching device, a voltage generation controller detects a voltage value of the output voltage (VOC) of the generator circuit, and allows activation of the other generator circuit after verifying that the detected voltage value is at or above a designated threshold.
    Type: Application
    Filed: March 24, 2014
    Publication date: June 16, 2016
    Inventors: Kohtaroh Kataoka, Masaru Nomura, Takeshi Shiomi, Shuji Wakaiki, Akihide Shibata, Hiroshi Iwata
  • Publication number: 20160164440
    Abstract: A solar energy utilization system includes a solar panel, a motor driven by an inverter circuit functioning as a motor drive circuit with power output by the solar panel, a solar output voltage monitor functioning as a monitor that monitors an input or an output of the solar panel and also functioning as a monitor that monitors an input or an output of the inverter circuit, and a controller. The controller has a control mode in which the inverter circuit is controlled such that an output voltage of the solar panel is maintained at a voltage higher than a maximum power point voltage. In this control mode, the controller performs the control such that a rotation speed of the motor is changed repeatedly at predetermined timings.
    Type: Application
    Filed: April 7, 2014
    Publication date: June 9, 2016
    Inventors: Kohtaroh Kataoka, Masaru Nomura, Takeshi Shiomi, Shuji Wakaiki, Akihide Shibata, Hiroshi Iwata
  • Publication number: 20160156267
    Abstract: A highly efficient and low-cost switching power supply device includes a high withstand voltage transistor and a low withstand voltage transistor. When current flows from a second node to a first node, the high withstand voltage transistor turns on and the low withstand voltage transistor turns off, causing current to flow through a built-in diode of the low withstand voltage transistor. Since current does not flow through the parasitic diode of the high withstand voltage transistor, the recovery current is reduced. Furthermore, since a first delay circuit including resistors and a diode is connected to the gate electrode of the high withstand voltage transistor, and a second delay circuit including resistors and a diode is connected to the gate electrode of the low withstand voltage transistor, precise adjustment of the switching speed during switching operation is possible, and losses are reduced.
    Type: Application
    Filed: March 14, 2014
    Publication date: June 2, 2016
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Akihide SHIBATA, Shuji WAKAIKI, Kohtaroh KATAOKA, Takeshi SHIOMI, Hiroki IGARASHI, Hiroshi IWATA