Abstract: A method for producing a protein encoded by a target gene, comprising the step of expressing the target gene in a bacterium of the genus Burkholderia, wherein the bacterium lacks one or more genes selected from the group consisting of BSFP_068740, BSFP_068730, and BSFP_068720, or has inhibited expression of the genes or proteins encoded by the genes.

Abstract: A welding state inspection method for ultrasonic-welded plate-like members includes the steps of measuring energy that has been transmitted to an anvil when ultrasonic-welding a plurality of plate-like members stacked on the anvil while pressing a horn that vibrates against the plate-like members; and determining a quality of a welding state of the plate-like members on the basis of the energy measured in the measuring step.

Abstract: A welding state inspection method for ultrasonic-welded plate-like members includes the steps of measuring energy that has been transmitted to an anvil when ultrasonic-welding a plurality of plate-like members stacked on the anvil while pressing a horn that vibrates against the plate-like members; and determining a quality of a welding state of the plate-like members on the basis of the energy measured in the measuring step.

Abstract: Provided are processes for producing high-purity succinic acid from a succinic-acid-containing liquid through crystallization.

Abstract: Provided are processes for producing high-purity succinic acid from a succinic-acid-containing liquid through crystallization.

Abstract: A mass spectrometry unit of the present invention includes a mass spectrometry portion that detects ion current values of a gas to be measured according to mass-to-charge ratio, to thereby measure partial pressures of the gas to be measured. The mass spectrometry unit further includes: a control portion for preliminary storing a record of a mass-to-charge ratio of a specific gas that decreases a function of a specific portion of the mass spectrometry unit, in which if an ion current value with the mass-to-charge ratio of the specific gas detected by the mass spectrometry portion is not less than a predetermined value, the control portion outputs a warning signal denoting a functional decrease in the specific portion.

Abstract: A mass spectrometry unit of the present invention includes a mass spectrometry portion that detects ion current values of a gas to be measured according to mass-to-charge ratio, to thereby measure partial pressures of the gas to be measured. The mass spectrometry unit further includes: a control portion for preliminary storing a record of a mass-to-charge ratio of a specific gas that decreases a function of a specific portion of the mass spectrometry unit, in which if an ion current value with the mass-to-charge ratio of the specific gas detected by the mass spectrometry portion is not less than a predetermined value, the control portion outputs a warning signal denoting a functional decrease in the specific portion.

Abstract: Touching (T) an arbitrary position 4 on a screen 1 displayed on a touch panel sets a plurality of screen areas A, B, C, and D into which the screen is divided using lines L1 and L2 which contain the position and which traverse the touch panel screen. Then, touching (C) an arbitrary position belonging to one C of the screen areas performs a process operation (C screen display) assigned to the screen area C. Further, releasing (R) the position 5 confirms the process operation (C screen display) assigned to the screen area C.

Abstract: Touching (T) an arbitrary position 4 on a screen 1 displayed on a touch panel sets a plurality of screen areas A, B, C, and D into which the screen is divided using lines L1 and L2 which contain the position 4 and which traverse the touch panel screen 1, and a first quadrant, a second quadrant, a third quadrant, and a fourth quadrant which correspond to the screen areas are set. Touching (T) an arbitrary position 5 belonging to one C of the screen areas allows a character assigned to the corresponding quadrant (third quadrant) to be recognized. Releasing the character at the position 5 allows the character assigned to that quadrant to be confirmed.

Abstract: A semiconductor device includes an external oscillation circuit connected to an external resonator, a self-exciting oscillation circuit, and an oscillation clock monitoring circuit, the oscillation clock monitoring circuit monitors an oscillation state of the external resonator using a clock signal generated by the self-exciting oscillation circuit, and when judged that the oscillation state has been stabilized, the terminating signal of the waiting time for stabilization of oscillation is outputted to terminate the waiting time for stabilization of oscillation of a microcomputer forcedly.

Abstract: A semiconductor device includes an external oscillation circuit connected to an external resonator, a self-exciting oscillation circuit, and an oscillation clock monitoring circuit, the oscillation clock monitoring circuit monitors an oscillation state of the external resonator using a clock signal generated by the self-exciting oscillation circuit, and when judged that the oscillation state has been stabilized, the terminating signal of the waiting time for stabilization of oscillation is outputted to terminate the waiting time for stabilization of oscillation of a microcomputer forcedly.

Abstract: In a layout method for an LSI having a plurality of cells, automated arrangement of cells is performed on the basis of a netlist, which has cells and connection data therefor, and timing conditions, and, once a timing optimization processing is performed so that a plurality of cells are arranged on a chip, global wiring processing is implemented and the wiring congestion rate is analyzed. In addition, in small regions where a wiring congestion rate is so high that detailed wiring processing is judged to be difficult, cell rearrangement processing is implemented. Next, detailed wiring processing is performed with respect to the cells which have been rearranged. The rearrangement of cells is performed only in small regions with a high congestion rate, with the result that the overall cell arrangement in which timing is optimized is not changed markedly, whereby it is possible to reduce the probability of wiring being impossible in the course of the detailed wiring processing.

Abstract: Each binary carry logic circuit 20 of half adder circuits other than that for the least significant digit comprises a transfer gate 212 turned on when an input bit A2 is active and receiving a carry-in bit *C2 at its data input, and a transistor 23, turned on when the input bit A2 is inactive, connected between a power supply potential VDD and the data output of the transfer gate 212 a signal on which is a carry-out bit *C3. Transfer gates 212 to 214 of binary carry logic circuits other than that for the least significant digit are connected in chain, and are simultaneously on/off controlled by input bits A2 to A4, letting the carry-in bit *C2 from the least significant digit propagate through the transfer gate chain at a high speed.

Abstract: Disclosed is a method for automatic wiring design between block circuits of an integrated circuit, which performs an automatic connection between an inter-block wire disposed between a first circuit block and a second circuit block, and terminals formed along sides of the first and second blocks, the sides facing each other. The method comprises the steps of (S2) sorting the terminals according to the width thereof; and (S3˜S11) selecting a terminal from the terminals in descending order of the width, and connecting between the selected terminal and an inter-block wire belonging to a same net as the terminal.

Abstract: A semiconductor device that prevents malfunction in an external circuit by preventing an indefinite signal from being output at the time of power being applied. A processing circuit is supplied with an internal power supply voltage from an internal power supply voltage generating circuit and performs a predetermined process. An output circuit outputs the result of processing by the processing circuit. When the supply of an external power supply voltage is begun, a control circuit exercises control so that output from the output circuit will be kept in a predetermined state. A supply circuit supplies an external power supply voltage to the control circuit.

Abstract: The present invention relates to (1) a cleaning gas for cleaning semiconductor production equipment, obtained by mixing SF6 and one or both of F2 with and NF3 with an inert gas at a specific ratio; (2) a cleaning gas for cleaning semiconductor production equipment, obtained by mixing SF6 and one or both of F2 and NF3 with an inert gas and an oxygen-containing gas at a specific ratio; (3) a method for cleaning semiconductor production equipment using the gas; and (4) a method for producing a semiconductor device including a cleaning step using the cleaning gas. By using the cleaning gas for semiconductor production equipment of the present invention which is high in the etching rate, efficient cleaning and production of semiconductor production equipment with excellent cost performance can be achieved.

Abstract: Disclosed is a method for automatic wiring design between block circuits of an integrated circuit, which performs an automatic connection between an inter-block wire disposed between a first circuit block and a second circuit block, and terminals formed along sides of the first and second blocks, the sides facing each other. The method comprises the steps of (S2) sorting the terminals according to the width thereof; and (S3˜S11) selecting a terminal from the terminals in descending order of the width, and connecting between the selected terminal and an inter-block wire belonging to a same net as the terminal.

Abstract: A semiconductor device that prevents malfunction in an external circuit by preventing an indefinite signal from being output at the time of power being applied. A processing circuit is supplied with an internal power supply voltage from an internal power supply voltage generating circuit and performs a predetermined process. An output circuit outputs the result of processing by the processing circuit. When the supply of an external power supply voltage is begun, a control circuit exercises control so that output from the output circuit will be kept in a predetermined state. A supply circuit supplies an external power supply voltage to the control circuit.

Abstract: In a layout method for an LSI having a plurality of cells, automated arrangement of cells is performed on the basis of a netlist, which has cells and connection data therefor, and timing conditions, and, once a timing optimization processing is performed so that a plurality of cells are arranged on a chip, global wiring processing is implemented and the wiring congestion rate is analyzed. In addition, in small regions where a wiring congestion rate is so high that detailed wiring processing is judged to be difficult, cell rearrangement processing is implemented. Next, detailed wiring processing is performed with respect to the cells which have been rearranged. The rearrangement of cells is performed only in small regions with a high congestion rate, with the result that the overall cell arrangement in which timing is optimized is not changed markedly, whereby it is possible to reduce the probability of wiring being impossible in the course of the detailed wiring processing.