Patents by Inventor Shuke YAN

Shuke YAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230223494
    Abstract: A method of forming light emitting diodes includes forming a first-conductivity-type compound semiconductor layer over a substrate, etching the first-conductivity-type compound semiconductor layer to form a first pillar structure and a second pillar structure without exposing the substrate between the first and the second pillar structures, selectively growing a semiconductor active layer over the first and the second pillar structures, and selectively growing a second-conductivity-type compound semiconductor layer on the semiconductor active layer.
    Type: Application
    Filed: January 6, 2023
    Publication date: July 13, 2023
    Inventors: Zhen CHEN, Saket CHADDA, Shuke YAN
  • Publication number: 20230132423
    Abstract: A method of forming a light emitting device includes forming a first doped compound semiconductor layer over a substrate, forming an active layer over the first doped compound semiconductor layer, forming a second doped compound semiconductor layer over the active layer, forming a patterned ion implantation mask layer, and implanting ions of at least one electrically inactive dopant species in portions of the active layer that are not masked by the patterned ion implantation mask layer. An electrically inactive insulating region including a semiconductor material and atoms of the at least one electrically inactive dopant species is formed. Unimplanted portions of the active layer constitute active regions of an array of light emitting diodes.
    Type: Application
    Filed: October 26, 2022
    Publication date: May 4, 2023
    Inventors: Zhen CHEN, Saket CHADDA, Shuke YAN
  • Patent number: 11264537
    Abstract: A light emitting diode includes a n-doped region, a p-doped region, and a light emitting region located between the n-doped region and a p-doped region. The n-doped region includes a first GaN layer, at least one n-doped second GaN layer located over the first GaN layer, an AlGaN dislocation blocking layer located over the at least one n-doped second GaN layer, and a n-doped third GaN layer located over the AlGaN dislocation blocking film.
    Type: Grant
    Filed: August 24, 2020
    Date of Patent: March 1, 2022
    Assignee: NANOSYS, INC.
    Inventors: Zhen Chen, Fariba Danesh, Fan Ren, Shuke Yan
  • Publication number: 20200388721
    Abstract: A light emitting diode includes a n-doped region, a p-doped region, and a light emitting region located between the n-doped region and a p-doped region. The n-doped region includes a first GaN layer, at least one n-doped second GaN layer located over the first GaN layer, an AlGaN dislocation blocking layer located over the at least one n-doped second GaN layer, and a n-doped third GaN layer located over the AlGaN dislocation blocking film.
    Type: Application
    Filed: August 24, 2020
    Publication date: December 10, 2020
    Inventors: Zhen CHEN, Fariba DANESH, Fan REN, Shuke YAN
  • Patent number: 10770620
    Abstract: A light emitting diode includes a n-doped region, a p-doped region, and a light emitting region located between the n-doped region and a p-doped region. The n-doped region includes a first GaN layer, at least one n-doped second GaN layer located over the first GaN layer, an AlGaN dislocation blocking layer located over the at least one n-doped second GaN layer, and a n-doped third GaN layer located over the AlGaN dislocation blocking film.
    Type: Grant
    Filed: May 6, 2019
    Date of Patent: September 8, 2020
    Assignee: GLO AB
    Inventors: Zhen Chen, Fariba Danesh, Fan Ren, Shuke Yan
  • Publication number: 20190386173
    Abstract: A light emitting diode includes a n-doped region, a p-doped region, and a light emitting region located between the n-doped region and a p-doped region. The n-doped region includes a first GaN layer, at least one n-doped second GaN layer located over the first GaN layer, an AlGaN dislocation blocking layer located over the at least one n-doped second GaN layer, and a n-doped third GaN layer located over the AlGaN dislocation blocking film.
    Type: Application
    Filed: May 6, 2019
    Publication date: December 19, 2019
    Inventors: Zhen CHEN, Fariba DANESH, Fan REN, Shuke YAN