Patents by Inventor Shumpei Ida

Shumpei Ida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Pseudo resistance circuit and charge detection circuit
    Patent number: 10187041
    Abstract: A pseudo resistance circuit is disclosed that is capable of suppressing fluctuation in resistance value with fluctuation in process or temperature and facilitating adjustment. The pseudo resistance circuit includes a first MOSFET, a second MOSFET, a first current source which generates a first current substantially proportional to absolute temperature, and voltage source which generates a first voltage, which is a substantially linear function of absolute temperature. The gate of the first MOSFET and the gate of the second MOSFET are connected together, the second MOSFET is diode-connected, the first current is supplied to the drain of the second MOSFET, the first voltage is applied to the source of the second MOSFET, and a resistor having a resistance value according to the gate voltage of the first MOSFET is formed between the drain and the source of the first MOSFET.
    Type: Grant
    Filed: April 11, 2017
    Date of Patent: January 22, 2019
    Assignees: MURATA MANUFACTURING CO., LTD., MASSACHUSETTS INSTITUTE OF TECHNOLOGY
    Inventors: Shumpei Ida, Hae-Seung Lee
  • PSEUDO RESISTANCE CIRCUIT AND CHARGE DETECTION CIRCUIT
    Publication number: 20180115303
    Abstract: A pseudo resistance circuit is disclosed that is capable of suppressing fluctuation in resistance value with fluctuation in process or temperature and facilitating adjustment. The pseudo resistance circuit includes a first MOSFET, a second MOSFET, a first current source which generates a first current substantially proportional to absolute temperature, and voltage source which generates a first voltage, which is a substantially linear function of absolute temperature. The gate of the first MOSFET and the gate of the second MOSFET are connected together, the second MOSFET is diode-connected, the first current is supplied to the drain of the second MOSFET, the first voltage is applied to the source of the second MOSFET, and a resistor having a resistance value according to the gate voltage of the first MOSFET is formed between the drain and the source of the first MOSFET.
    Type: Application
    Filed: April 11, 2017
    Publication date: April 26, 2018
    Inventors: Shumpei Ida, Hae-Seung Lee