Patents by Inventor Shun Cheng Yang

Shun Cheng Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240065438
    Abstract: A slide rail assembly is provided and includes a first rail, a second rail movable with respect to the first rail, a working member, an operating member and a blocking member. When the second rail is located at an extended position with respect to the first rail and the working member is in a first state, the working member and a blocking feature of the first rail block each other for restraining the second rail from moving toward a first predetermined direction from the extended position. The blocking member is switchable between a blocking state and a non-blocking state for restraining the operating member from driving the working member to disengage from the first state or for allowing the operating member to drive the working member from the first state to a second state. Besides, a related slide rail kit is also provided.
    Type: Application
    Filed: December 19, 2022
    Publication date: February 29, 2024
    Applicants: KING SLIDE WORKS CO., LTD., KING SLIDE TECHNOLOGY CO.,LTD.
    Inventors: Ken-Ching Chen, Shun-Ho Yang, Tzu-Cheng Weng, Chun-Chiang Wang
  • Publication number: 20240068516
    Abstract: A slide rail assembly includes a first rail, a second rail, a slide assisting device, an elastic member and a working member. The second rail and the first rail are movable relative to each other. The elastic member is arranged on the second rail. During a process of the second rail being moved relative to the first rail along an opening direction, the working member is configured to contact the elastic member in an initial state in order to drive the slide assisting device to move along the opening direction to a predetermined position. When the slide assisting device is located at the predetermined position, the elastic member releases an elastic force through a predetermined space of the first rail, such that the elastic member is no longer in the initial state with the working member no longer contacting the elastic member.
    Type: Application
    Filed: January 11, 2023
    Publication date: February 29, 2024
    Inventors: Ken-Ching Chen, Shun-Ho Yang, Tzu-Cheng Weng, Chun-Chiang Wang
  • Patent number: 11316039
    Abstract: A method of manufacturing a semiconductor device is provided. The method includes forming a channel layer and an active layer over a substrate; forming a doped epitaxial layer over the active layer; patterning the doped epitaxial layer, the active layer, and the channel layer to form a fin structure comprising a doped epitaxial fin portion, an active fin portion below the doped epitaxial fin portion, and a channel fin portion below the active fin portion; removing the doped epitaxial fin portion; and forming a gate electrode at least partially extending along a sidewall of the fin structure to form a Schottky barrier between the gate electrode and the fin structure after removing the doped epitaxial fin portion.
    Type: Grant
    Filed: July 23, 2020
    Date of Patent: April 26, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chao-Hsin Wu, Li-Cheng Chang, Cheng-Jia Dai, Shun-Cheng Yang
  • Publication number: 20200357908
    Abstract: A method of manufacturing a semiconductor device is provided. The method includes forming a channel layer and an active layer over a substrate; forming a doped epitaxial layer over the active layer; patterning the doped epitaxial layer, the active layer, and the channel layer to form a fin structure comprising a doped epitaxial fin portion, an active fin portion below the doped epitaxial fin portion, and a channel fin portion below the active fin portion; removing the doped epitaxial fin portion; and forming a gate electrode at least partially extending along a sidewall of the fin structure to form a Schottky barrier between the gate electrode and the fin structure after removing the doped epitaxial fin portion.
    Type: Application
    Filed: July 23, 2020
    Publication date: November 12, 2020
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Chao-Hsin WU, Li-Cheng CHANG, Cheng-Jia DAI, Shun-Cheng YANG
  • Patent number: 10727328
    Abstract: A semiconductor device includes a substrate, a channel layer, an active layer, and a gate electrode. The channel layer has a fin portion over the substrate. The active layer is over at least the fin portion of the channel layer. The active layer is configured to cause a two-dimensional electron gas (2DEG) to be formed in the channel layer along an interface between the channel layer and the active layer. The gate electrode is in contact with a sidewall of the fin portion of the channel layer.
    Type: Grant
    Filed: April 12, 2018
    Date of Patent: July 28, 2020
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Chao-Hsin Wu, Li-Cheng Chang, Cheng-Jia Dai, Shun-Cheng Yang
  • Publication number: 20190165153
    Abstract: A semiconductor device includes a substrate, a channel layer, an active layer, and a gate electrode. The channel layer has a fin portion over the substrate. The active layer is over at least the fin portion of the channel layer. The active layer is configured to cause a two-dimensional electron gas (2DEG) to be formed in the channel layer along an interface between the channel layer and the active layer. The gate electrode is in contact with a sidewall of the fin portion of the channel layer.
    Type: Application
    Filed: April 12, 2018
    Publication date: May 30, 2019
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Chao-Hsin WU, Li-Cheng CHANG, Cheng-Jia DAI, Shun-Cheng YANG
  • Patent number: 8737450
    Abstract: High speed serial link techniques are provided. A system applying the high speed serial link technique comprises a relay unit and an amplifier. The relay unit receives a first pair of differential signals provided by a high speed transmitter of a first device, and provides the amplifier with at least one signal that is generated based on the first pair of differential signals. The amplifier amplifies and converts the signal provided by the relay unit to a second pair of differential signals to be received by a high speed receiver of a second device.
    Type: Grant
    Filed: August 31, 2009
    Date of Patent: May 27, 2014
    Assignee: Via Technologies, Inc.
    Inventor: Shun-Cheng Yang
  • Publication number: 20110002368
    Abstract: High speed serial link techniques are provided. A system applying the high speed serial link technique comprises a relay unit and an amplifier. The relay unit receives a first pair of differential signals provided by a high speed transmitter of a first device, and provides the amplifier with at least one signal that is generated based on the first pair of differential signals. The amplifier amplifies and converts the signal provided by the relay unit to a second pair of differential signals to be received by a high speed receiver of a second device.
    Type: Application
    Filed: August 31, 2009
    Publication date: January 6, 2011
    Applicant: VIA TECHNOLOGIES, INC.
    Inventor: Shun-Cheng Yang
  • Patent number: 7502218
    Abstract: A multi-terminal capacitor includes a first capacitor plate, a second capacitor plate in parallel with the first capacitor plate, and a third capacitor plate in parallel with the first and second capacitor plates. The first, second and third capacitor plates are separated from each other by dielectric material, such that the first, second and third capacitor plates function as a first, second and third terminals, respectively, for capacitors formed therebetween.
    Type: Grant
    Filed: November 9, 2005
    Date of Patent: March 10, 2009
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Shun Cheng Yang
  • Publication number: 20070234076
    Abstract: A power management system for a network device is provided. The network device is connected to a user device and includes a system module. The power management system includes a main power module, a detecting module, and a power-driving module. The main power module is for supplying power to the system module. The detecting module is for detecting a connection status between the network device and the user device, and reading the connection status. The power-driving module is for detecting a status of the main power module, and sending a control signal according to the status of the main power module and the connection status detected by the detecting module.
    Type: Application
    Filed: August 26, 2006
    Publication date: October 4, 2007
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: SHUN-CHENG YANG